Search results for "power-up"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
18	Weiping Liao, Joseph M. Basile, Lei He 0001	Leakage power modeling and reduction with data retention.	ICCAD	2002	DBLP DOI BibTeX RDF
15	Fei Li 0003, Lei He 0001, Kewal K. Saluja	Estimation of Maximum Power-Up Current.	ASP-DAC/VLSI Design	2002	DBLP DOI BibTeX RDF	current estimation, ATPG algorithm, leakage reduction
14	Wanping Zhang, Yi Zhu 0002, Wenjian Yu, Amirali Shayan Arani, Renshen Wang, Zhi Zhu, Chung-Kuan Cheng	Noise minimization during power-up stage for a multi-domain power network.	ASP-DAC	2009	DBLP DOI BibTeX RDF
14	Fei Li 0003, Lei He 0001, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy	High-level area and power-up current estimation considering rich cell library.	ASP-DAC	2004	DBLP DOI BibTeX RDF
14	Victor V. Zyuban, Peter M. Kogge	Optimization of high-performance superscalar architectures for energy efficiency.	ISLPED	2000	DBLP DOI BibTeX RDF
12	Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer 0001, Narayanan Vijaykrishnan, Chita R. Das	A case for dynamic frequency tuning in on-chip networks.	MICRO	2009	DBLP DOI BibTeX RDF
11	Tuan Vu Cao, Dag T. Wisland, Tor Sverre Lande, Farshad Moradi, Young Hee Kim	Novel start-up circuit with enhanced power-up characteristic for bandgap references.	SoCC	2008	DBLP DOI BibTeX RDF
9	Qiang Wang, Subodh Gupta, Jason Helge Anderson	Clock power reduction for virtex-5 FPGAs.	FPGA	2009	DBLP DOI BibTeX RDF	optimization, field-programmable gate arrays, fpgas, low-power design, power, clocking
9	Saeid Hashemi, Mohamad Sawan, Yvon Savaria	A power planning model for implantable stimulators.	ISCAS	2006	DBLP DOI BibTeX RDF
9	Fei Hu, Vishwani D. Agrawal	Dual-transition glitch filtering in probabilistic waveform power estimation.	ACM Great Lakes Symposium on VLSI	2005	DBLP DOI BibTeX RDF	dual-transition probability, dynamic power estimation, glitch filtering, probabilistic waveform simulation
9	Vladislav Y. Potanin, Elena E. Potanina	High-voltage-tolerant power supply in a low-voltage CMOS technology.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
9	Aamir Wali, Muhammad Ahmad Ghazali, Saqib Rehan Ayyubi	Comparative Analysis of Mobile IP and HAWAII.	IMTIC	2008	DBLP DOI BibTeX RDF	HAWAII, Power up, Mobile IP, Paging, Comparative Analysis, Micromobility, Macro-mobility
8	Zhu Han 0001, K. J. Ray Liu	Power minimization under throughput management over wireless networks with antenna diversity.	IEEE Trans. Wirel. Commun.	2004	DBLP DOI BibTeX RDF
6	Paulina Lanz, Todd Cunningham, Hoan Nguyen, Pete White, François Bar	Skid Row Power Now!: A participatory co-design project to power up digital devices in Skid Row.	C&T	2021	DBLP DOI BibTeX RDF
6	Filip Lange-Nielsen	The Power-up Experience: A study of Power-ups in Games and their Effect on Player Experience.	DiGRA Conference	2011	DBLP BibTeX RDF
6	Nadia Barhoul, Houda Senhaji, Mohamed Halim Sbaa, Aimad El Mourabit	Soft power up \| power down on Digital to Analog Converter CMOS65.	ICECS	2007	DBLP DOI BibTeX RDF
6	Dinesh C. Suresh, Jun Yang 0002, Chuanjun Zhang, Banit Agrawal, Walid A. Najjar	FV-MSB: A Scheme for Reducing Transition Activity on Data Buses.	HiPC	2003	DBLP DOI BibTeX RDF
6	André Mansano, Andre Vilas Boas, Alfredo Olmos, Jefferson Soldera	Zero quiescent current startup circuit with automatic turning-off for low power current and voltage reference.	SBCCI	2009	DBLP DOI BibTeX RDF	power-up, starter, initialization, start-up, current reference
5	Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune	A non-volatile run-time FPGA using thermally assisted switching MRAMS.	FPL	2008	DBLP DOI BibTeX RDF
5	William Enck, Kevin R. B. Butler, Thomas Richardson, Patrick D. McDaniel, Adam D. Smith	Defending Against Attacks on Main Memory Persistence.	ACSAC	2008	DBLP DOI BibTeX RDF
5	Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Paolo Ienne, Laura Pozzi	Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core.	VLSI Design	2006	DBLP DOI BibTeX RDF
5	Cyril Rabat, Alain Bui, Olivier Flauzac	A Random Walk Topology Management Solution for Grid.	IICS	2005	DBLP DOI BibTeX RDF
5	Fei Li 0003, Lei He 0001, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy	High Level Area and Current Estimation.	PATMOS	2003	DBLP DOI BibTeX RDF
3	Garrett Allen, Gaole He, Ujwal Gadiraju	Power-up! What Can Generative Models Do for Human Computation Workflows?	CoRR	2023	DBLP DOI BibTeX RDF
3	Xugang Wu, Huijun Wu 0001, Ruibo Wang, Duanyu Li, Xu Zhou, Kai Lu	Leveraging Free Labels to Power up Heterophilic Graph Learning in Weakly-Supervised Settings: An Empirical Study.	ECML/PKDD (3)	2023	DBLP DOI BibTeX RDF
3	Natalia Laiton, Victor Sicachá, Ana María Garzón, David Celeita, Trung-Dung Le	A Review of Data-Driven Solutions to Power Up Maintenance of Electrical Systems for Predictive Decision Making Through Fault Analysis.	IAS	2023	DBLP DOI BibTeX RDF
3	Mohammed-Amr Abd El-Migid, Damon Cai, Thomas Niven, Jeffrey Vo, Kashumi Madampe, John Grundy 0001, Rashina Hoda	Emotimonitor: A Trello power-up to capture and monitor emotions of Agile teams.	J. Syst. Softw.	2022	DBLP DOI BibTeX RDF
3	Muhammad S. Gull, Naveed Arshad	Optimization of the battery swapping station to power up mobile and stationary loads.	e-Energy	2022	DBLP DOI BibTeX RDF
3	Mohammed-Amr Abd El-Migid, Damon Cai, Thomas Niven, Jeffrey Vo, Kashumi Madampe, John C. Grundy, Rashina Hoda	Emotimonitor: A Trello Power-Up to Capture Emotions of Agile Teams.	CoRR	2021	DBLP BibTeX RDF
3	Ming Jin 0002, Heng Chang, Wenwu Zhu 0001, Somayeh Sojoudi	Power up! Robust Graph Convolutional Network via Graph Powering.	AAAI	2021	DBLP DOI BibTeX RDF
3	Jonatas Adilson Marques, Zhongke Wu, Xingce Wang, Ruslan Kuchumov, Vladimir Korkhov, Weverton Luis da Costa Cordeiro, Philippe O. A. Navaux, Luciano Paschoal Gaspary	Harnessing Cloud Computing to Power Up HPC Applications: The BRICS CloudHPC Project.	ICCSA (8)	2021	DBLP DOI BibTeX RDF
3	Ming Jin 0002, Heng Chang, Wenwu Zhu 0001, Somayeh Sojoudi	Power up! Robust Graph Convolutional Network against Evasion Attacks based on Graph Powering.	CoRR	2019	DBLP BibTeX RDF
3	Juyun Lee, Dong-Woo Jee, Dongsuk Jeon	Power-up control techniques for reliable SRAM PUF.	IEICE Electron. Express	2019	DBLP DOI BibTeX RDF
3	Daniela Charris, Diego Gómez, Mauricio Pardo	A Portable Thermoelectric Energy Harvesting Unit to Power Up Outdoor Sensors and Devices.	SAS	2019	DBLP DOI BibTeX RDF
3	S. V. Nagaraj	Review of Power Up: : Unlocking the hidden mathematics in video games.	SIGACT News	2018	DBLP DOI BibTeX RDF
3	Zhonghao Liao, Yong Guan	The Cell Dependency Analysis on Learning SRAM Power-Up States.	AsianHOST	2018	DBLP DOI BibTeX RDF
3	Sying-Jyan Wang, Chin-Hung Lien, Katherine Shu-Min Li	Register PUF with No Power-Up Restrictions.	ISCAS	2018	DBLP DOI BibTeX RDF
3	Konrad-Felix Krentz, Christoph Meinel, Hendrik Graupner	Secure self-seeding with power-up SRAM states.	ISCC	2017	DBLP DOI BibTeX RDF
3	Zhonghao Liao, George T. Amariucai, Raymond K. W. Wong, Yong Guan	The impact of discharge inversion effect on learning SRAM power-up statistics.	AsianHOST	2017	DBLP DOI BibTeX RDF
3	Toshiro Hiramoto, Tomoko Mizutani, Kiyoshi Takeuchi, Masaharu Kobayashi	Parallel nonvolatile programming of power-up states of SRAM cells.	ASICON	2017	DBLP DOI BibTeX RDF
3	Yuejun Zhang, Pengjun Wang, Gang Li, Haoyu Qian, Xiaomin Zheng	Design of power-up and arbiter hybrid physical unclonable functions in 65nm CMOS.	ASICON	2015	DBLP DOI BibTeX RDF
3	Mikhail Platonov, Josef Hlavác, Róbert Lórencz	Using Power-Up SRAM State of Atmel ATmega1284P Microcontrollers as Physical Unclonable Function for Key Generation and Chip Identification.	Inf. Secur. J. A Glob. Perspect.	2013	DBLP DOI BibTeX RDF
3	Shi-Hao Chen, Youn-Long Lin, Mango Chia-Tso Chao	Power-Up Sequence Control for MTCMOS Designs.	IEEE Trans. Very Large Scale Integr. Syst.	2013	DBLP DOI BibTeX RDF
3	Daniel Spelmezan, Caroline Appert, Olivier Chapuis, Emmanuel Pietriga	Controlling widgets with one power-up button.	UIST	2013	DBLP DOI BibTeX RDF
3	Ben Niewenhuis, Ronald D. Blanton, Mudit Bhargava, Ken Mai	SCAN-PUF: A low overhead Physically Unclonable Function from scan chain power-up states.	ITC	2013	DBLP DOI BibTeX RDF
3	Tangbiao Zhang, Qingsheng Hu	A high-speed and low-power up/down counter in 0.18-μm CMOS technology.	WCSP	2012	DBLP DOI BibTeX RDF
3	Daniel E. Holcomb, Wayne P. Burleson, Kevin Fu	Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers.	IEEE Trans. Computers	2009	DBLP DOI BibTeX RDF
3	Jae-Yoon Sim, Kee-Won Kwon, Ki-Chul Chun	Charge-transferred presensing, negatively precharged word-line, and temperature-insensitive power-up schemes for low-voltage DRAMs.	IEEE J. Solid State Circuits	2004	DBLP DOI BibTeX RDF
3	Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton	Exploiting power-up delay for sequential optimization.	EURO-DAC	1995	DBLP DOI BibTeX RDF
3	Vigyan Singhal, Robert K. Brayton, Carl Pixley	Power-Up Delay for Retiming Digital Circuits.	ISCAS	1995	DBLP DOI BibTeX RDF
3	Mohamad Sawan, Benoit Gosselin	Multichannel intracortical neurorecording: integration and packaging challenges.	SBCCI	2009	DBLP DOI BibTeX RDF	bioelectronics, implantable devices, biosensors, wireless links
3	Zurab Khasidashvili	On Formal Equivalence Verification of Hardware.	CSR	2008	DBLP DOI BibTeX RDF
3	Truong Quang Vinh, Young-Chul Kim 0001	A low power crosstalk-free bus encoding using genetic algorithm.	AICCSA	2008	DBLP DOI BibTeX RDF
3	Janos Sebestyen Janosy	Simulator-Aided Instrumentation and Control System Refurbishment at Paks Nuclear Power Plant.	Asia International Conference on Modelling and Simulation	2007	DBLP DOI BibTeX RDF
3	Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon	New non-volatile FPGA concept using Magnetic Tunneling Junction.	ISVLSI	2006	DBLP DOI BibTeX RDF
3	Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon	Magnetic tunnelling junction based FPGA.	FPGA	2006	DBLP DOI BibTeX RDF	magnetic tunneling junction, FPGA, non volatility
3	Alberto Saiz-Vela, Pedro Lluís Miribel-Català, Manel Puig-Vidal, Josep Samitier	An electron mobility independent pulse skipping regulator for a programmable CMOS charge pump.	ISCAS (1)	2005	DBLP DOI BibTeX RDF
3	Jasmeet Chhabra, Nandakishore Kushalnagar, Benjamin Metzler, Allen Sampson	Sensor networks in intel fabrication plants.	SenSys	2004	DBLP DOI BibTeX RDF	predictive maintenance, sensor networks, vibration analysis
3	Vigyan Singhal, Carl Pixley, Adnan Aziz, Shaz Qadeer, Robert K. Brayton	Sequential optimization in the absence of global reset.	ACM Trans. Design Autom. Electr. Syst.	2003	DBLP DOI BibTeX RDF	Sequential logic synthesis, no-reset latches, safe replaceability
3	Vigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton	Theory of safe replacements for sequential circuits.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
3	Peeter Ellervee, Miguel Miranda, Francky Catthoor, Ahmed Hemani	System-level data-format exploration for dynamically allocated datastructures.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2001	DBLP DOI BibTeX RDF
3	Luca Fanucci, Sergio Saponara, Andrea Cenciotti	IP Reuse VLSI Architecture for Low Complexity Fast Motion Estimation in Multimedia Applications.	EUROMICRO	2000	DBLP DOI BibTeX RDF
3	Jie-Hong Roland Jiang, Iris Hui-Ru Jiang	Optimum loading dispersion for high-speed tree-type decision circuitry.	ICCAD	1999	DBLP DOI BibTeX RDF
2	Benoît Badrignans, Reouven Elbaz, Lionel Torres	Secure FPGA configuration architecture preventing system downgrade.	FPL	2008	DBLP DOI BibTeX RDF
2	Rajat Subhra Chakraborty, Swarup Bhunia	Micropipeline-Based Asynchronous Design Methodology for Robust System Design Using Nanoscale Crossbar.	ISQED	2008	DBLP DOI BibTeX RDF	Diode-resistor logic, CMOSNano, Asynchronous design
2	Hyung Yun Kong, Yun-Kyeong Hwang, Dae-Kyu Choi, Gun-seok Kim	Design of Bandwidth Efficient M-1-1 Protocol in Wireless Sensor Networks.	ICIC (3)	2007	DBLP DOI BibTeX RDF	M-1-1 protocol, WSN, Cooperative communication, Bandwidth efficient
2	Mensur Omerbashich	Gauss-Vanícek Spectral Analysis of the Sepkoski Compendium: No New Life Cycles.	Comput. Sci. Eng.	2006	DBLP DOI BibTeX RDF	data alteration, spectrum distortion, genera variations, spectral analysis, time series analysis, life cycles, least squares methods
2	Wilfried Steiner, Michael Paulitsch	The Transition from Asynchronous to Synchronous System Operation: An Approach for Distributed Fault-Tolerant Systems.	ICDCS	2002	DBLP DOI BibTeX RDF
2	Bruce Cowan, Owen Farnsworth, Peter Jakobsen, Steven F. Oakland, Michael Ouellette, Donald L. Wheater	On-Chip Repair and an ATE Independent Fusing Methodology.	ITC	2002	DBLP DOI BibTeX RDF
2	Stephan Olariu, Ivan Stojmenovic, Albert Y. Zomaya	On the Dynamic Initialization of Parallel Computers.	J. Supercomput.	2000	DBLP DOI BibTeX RDF	meshes with broadcasting, parallel architectures, hypercubes, meshes, initialization, rings, binary trees, linear arrays, tori
2	Stephan Olariu, Ivan Stojmenovic, Albert Y. Zomaya	On the Dynamic Initialization of Parallel Computers.	IPPS	1997	DBLP DOI BibTeX RDF
2	Shaz Qadeer, Robert K. Brayton, Vigyan Singhal	Latch Redundancy Removal Without Global Reset.	ICCD	1996	DBLP DOI BibTeX RDF	global reset assumption, latch redundancy, safe replacement, delayed replacement, Finite state machine, core, strongly connected components
2	Hyunwoo Cho, Seh-Woong Jeong, Fabio Somenzi, Carl Pixley	Synchronizing sequences and symbolic traversal techniques in test generation.	J. Electron. Test.	1993	DBLP DOI BibTeX RDF	implicit state enumeration, multiple observation time, test generation, Binary decision diagram, synchronizing sequence