Search results for "28nm"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
63	Stephen P. Kornachuk, Michael C. Smayling	New strategies for gridded physical design for 32nm technologies and beyond.	ISPD	2009	DBLP DOI BibTeX RDF	28nm, 32nm, 45nm, litho, rdr, placement, layout, physical design, manufacturability, lithography, standard cell, vlsi, drc, dfm
32	Alain Bravaix, M. Saliva, Florian Cacho, X. Federspiel, Cheikh Ndiaye, Souhir Mhira, Edith Kussener, E. Pauly, Vincent Huard	Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes.	IOLTS	2016	DBLP DOI BibTeX RDF
26	Patrick Groeneveld	Going with the flow: bridging the gap between theory and practice in physical design.	ISPD	2010	DBLP DOI BibTeX RDF	experimental evidence, design, algorithms, flow
26	Andrzej J. Strojwas, Tejas Jhaveri, Vyacheslav Rovner, Lawrence T. Pileggi	Creating an affordable 22nm node using design-lithography co-optimization.	DAC	2009	DBLP DOI BibTeX RDF	design technology co-optimization, templates, DFM, regular fabric
26	Jung Hwan Choi, Jayathi Murthy, Kaushik Roy 0001	The effect of process variation on device temperature in FinFET circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
16	Yong-Jin Lee, Woojin Jang, Hong-Hyun Bae, Jeong-Hyun Cho, Hyun-Sik Kim	14.10 34.7A/mm2 Scalable Distributed All-Digital 6×6 Dot-LDOs Featuring Freely Linkable Current-Sharing Network: A Fine-Grained On-Chip Power Delivery Solution in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yen-Po Lin, Pen-Jui Peng, Chun-Chang Lu, Po-Ting Shen, Yun-Cheng Jao, Ping-Hsuan Hsieh	7.7 A 2.16pJ/b 112Gb/s PAM-4 Transceiver with Time-Interleaved 2b/3b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yuhao Ju, Ganqi Xu, Jie Gu 0001	20.4 A 28nm Physics Computing Unit Supporting Emerging Physics-Informed Neural Network and Finite Element Method for Real-Time Scientific Computing on Edge Devices.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yanshu Guo, Qichun Liu, Wenqiang Huang, Yaoyu Li, Tian Tian, Nan Wu, Siqi Zhang, Tiefu Li, Zhihua Wang 0001, Ning Deng 0008, Yuanjin Zheng, Hanjun Jiang	29.4 A Cryo-CMOS Quantum Computing Unit Interface Chipset in 28nm Bulk CMOS with Phase-Detection Based Readout and Phase-Shifter Based Pulse Generation.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yihong Zhu, Wenping Zhu, Yi Ouyang, Junwen Sun, Min Zhu 0001, Qi Zhao, Jinjiang Yang, Chen Chen, Qichao Tao, Guang Yang, Aoyang Zhang, Shaojun Wei, Leibo Liu	16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical Problems.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang 0014	34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu	34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Dawei Tang, Xiaoyue Xia, Zheng Yan, Peigen Zhou, Zekun Li 0005, Chun Yang, Rui Zhang, Zhe Chen, Jixin Chen, Hao Gao 0001, Wei Hong 0002	24.1 A 90-to-180GHz APD-Integrated Transmitter Achieving 18dBm Psat in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Liping Zhong, Hongzhi Wu, Yangyi Zhang, Xuxu Cheng, Weitao Wu, Catherine Wang, Xiongshi Luo, Taiyang Fan, Dongfan Xu, Quan Pan 0002	7.6 A 112Gb/s/pin Single-Ended Crosstalk-Cancellation Transceiver with 31dB Loss Compensation in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Mostafa M. Ayesh, Soumya Mahapatra, Ce Yang, Mike Shuo-Wei Chen	5.3 A 0.072mm2 18-to-21GHz Non-Uniform Sub-Sampling Receiver with a Non-Uniform Discrete-Time FIR Filter Achieving 42dB Blocker Rejection in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Hyunhoon Lee, Hyeokjun Kwon, Youngjoo Lee	16.1 A 2.7-to-13.3μJ/boot/slot Flexible RNS-CKKS Processor in 28nm CMOS Technology for FHE-Based Privacy-Preserving Computing.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Mao Li, Zhaoqing Wang, Sanu K. Mathew, Vivek De, Mingoo Seok	16.6 PACTOR: A Variation-Tolerant Probing-Attack Detector for a 2.5Gb/s×4-Channel Chip-to-Chip Interface in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Weiwei Shan, Kaize Zhou, Keran Li, Yuxuan Du, Zhuo Chen, Junyi Qian, Haitao Ge, Jun Yang 0006, Xin Si	14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Weitao Wu, Hongzhi Wu, Liping Zhong, Xuxu Cheng, Xiongshi Luo, Dongfan Xu, Catherine Wang, Zhenghao Li, Quan Pan 0002	13.5 A 64Gb/s/pin PAM4 Single-Ended Transmitter with a Merged Pre-Emphasis Capacitive-Peaking Crosstalk-Cancellation Scheme for Memory Interfaces in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Yang Wang, Xiaolong Yang, Yubin Qin, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Huiming Han, Shaojun Wei, Yang Hu 0001, Shouyi Yin	34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Ruiqi Guo, Lei Wang, Xiaofeng Chen, Hao Sun, Zhiheng Yue, Yubin Qin, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu 0001, Shouyi Yin	20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Liqun Feng, Xuansheng Ji, Longhao Kuang, Qianxian Liao, Su Han, Jiahao Zhao, Woogeun Rhee, Zhihua Wang 0001	14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOS.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Shiyu Guo, Sachin S. Sapatnekar, Jie Gu 0003	2.5 A 28nm Physical-Based Ray-Tracing Rendering Processor for Photorealistic Augmented Reality with Inverse Rendering and Background Clustering for Mobile Devices.	ISSCC	2024	DBLP DOI BibTeX RDF
16	Pierre Ferrer, François Rivet, Hervé Lapuyade, Yann Deval	A Walsh-Based Arbitrary Waveform Generator for 5G Applications in 28nm FD-SOI CMOS Technology.	IEEE Access	2023	DBLP DOI BibTeX RDF
16	Long Chen, Cai Li, Tao Wang, Junyi Qian, Weiwei Shan	A 1.23μJ/Inference, All-Digital Shuffle-Type Group-CNN Accelerator in 28nm CMOS With 85.8% Accuracy on CIFAR-10.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
16	Yan Zhao, Chao Chen, Jun Yang 0006	A 0.55V 10-Bit 100-MS/s SAR ADC With 3.6-fJ/Conversion-Step in 28nm CMOS for RF Receivers.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
16	Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Jiahao Song, Haoyang Luo, Xin'an Wang, Yuan Wang 0001	A 28nm 32Kb SRAM Computing-in-Memory Macro With Hierarchical Capacity Attenuator and Input Sparsity-Optimized ADC for 4b Mac Operation.	IEEE Trans. Circuits Syst. II Express Briefs	2023	DBLP DOI BibTeX RDF
16	Michael Rogenmoser, Luca Benini	Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm.	CoRR	2023	DBLP DOI BibTeX RDF
16	Joao Henrique Quintino Palhares, Yann Beilliard, Jury Sandrini, Franck Arnaud, Kevin Garello, Guillaume Prenat, Lorena Anghel, Fabien Alibart, Dominique Drouin, Philippe Galy	A tunable and versatile 28nm FD-SOI crossbar output circuit for low power analog SNN inference with eNVM synapses.	CoRR	2023	DBLP DOI BibTeX RDF
16	Felicia Guo, Nayiri Krzysztofowicz, Alex Moreno, Jeffrey Ni, Daniel Lovell, Yufeng Chi, Kareem Ahmad, Sherwin Afshar, Josh Alexander, Dylan Brater, Cheng Cao, Daniel Fan, Ryan Lund, Jackson Paddock, Griffin Prechter, Troy Sheldon, Shreesha Sreedhara, Anson Tsai, Eric Wu, Kerry Yu, Daniel Fritchman, Aviral Pandey, Ali Niknejad, Kristofer S. J. Pister, Borivoje Nikolic	A Heterogeneous SoC for Bluetooth LE in 28nm.	HCS	2023	DBLP DOI BibTeX RDF
16	João Cabacinho, João Casaleiro, Luís Oliveira	Design of a 28nm CMOS Self-Biased Ring Oscillator for Intrinsically Robust PVT TRNG.	PRIME	2023	DBLP DOI BibTeX RDF
16	Ioanna Apostolina, Danilo Manstretta	A 20-GHz Multi-Core Digitally Controlled Oscillator with -118 dBc/Hz Phase Noise at 1MHz Offset in 28nm CMOS.	PRIME	2023	DBLP DOI BibTeX RDF
16	Da Fu, Danyu Wu, Xuan Guo, Hanbo Jia, Jie Fu, Shan Lu, Xinyu Liu 0004	A 64Gbps 1.36 Vppd 1.44pJ/b Fully CMOS-Style Transmitter with Active Hybrid Driver in 28nm CMOS.	MWSCAS	2023	DBLP DOI BibTeX RDF
16	Tidjani Garba-Seybou, Xavier Federspiel, Frederic Monsieur, Mathieu Sicre, Florian Cacho, Joycelyn Hai, Alain Bravaix	Location of Oxide Breakdown Events under Off-state TDDB in 28nm N-MOSFETs dedicated to RF applications.	IRPS	2023	DBLP DOI BibTeX RDF
16	Dexuan Huo, Jilin Zhang, Jian Zhang, Hong Chen 0002	A 28nm Energy-efficient Asynchronous SNN Accelerator with On-chip Learning for Gas Recognition.	ASYNC	2023	DBLP DOI BibTeX RDF
16	Michael Rogenmoser, Luca Benini	Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm.	ICECS	2023	DBLP DOI BibTeX RDF
16	Wenqiang Huang, Yanshu Guo, Yaoyu Li, Zhihua Wang 0001, Yuanjin Zheng, Tiefu Li, Wen Jia, Hanjun Jiang	A 400uW 3.6GHz-4.6GHz Low Power Cryogenic CP-PLL with Transformer-Based VCO in 28nm Bulk CMOS.	ICTA	2023	DBLP DOI BibTeX RDF
16	Shijie Li, Ruichang Ma, Mingxing Deng, Jiamin Xue, Wei Deng 0001, Baoyong Chi, Haikun Jia	INVITED PAPER: A 312.5Mbps-32Gbps JESD204C Wireline Transceiver Back-Compatible with JESD204B in 28nm CMOS.	ICTA	2023	DBLP DOI BibTeX RDF
16	Ruixuan Yang, Shuaizhe Ma, Dan Li 0011	Low-Power Inductor-Less Optical Receiver for 50G PON in 28nm CMOS.	ICTA	2023	DBLP DOI BibTeX RDF
16	Yizhi Ding, Haochang Zhi, Jintao Li, Zhuo Chen, Kaiyue Yang, Weiwei Shan	A Compact and Robust 28nm CMOS Temperature Sensor with Machine Learning Assisted Design for DVFS SoC.	ICTA	2023	DBLP DOI BibTeX RDF
16	Erik Olieman, Helmut Kranabenter, Mark Stoopman, Alberto Dei, Christophe Pinatel, Jan van Sinderen	A worldwide-compliant 802.15.4/4z IR-UWB RFDAC transmitter in 28nm CMOS with 12dBm peak output power.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Lucas Moura Santana, Ewout Martens, Jorge Lagos 0001, Piet Wambacq, Jan Craninckx	A 70MHz Bandwidth Time-Interleaved Noise-Shaping SAR Assisted Delta Sigma ADC with Digital Cross-Coupling in 28nm CMOS.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Hanho Choi, Ha-Il Song, Hyosup Won, Jun Young Yoo, Woohyun Kwon, Huxian Jin, Konan Kwon, Cheong Min Lee, Gain Kim, Jake Eu, Sean Park, Hyeon-Min Bae	An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Andres Asprilla, Andreia Cathelin, Yann Deval	0.45-mW 2.35-3.0 GHz Multiplying DLL with Calibration Loop in 28nm CMOS FD-SOI.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Soufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé	A 291nW Real-Time Event-Driven Spectrogram Extraction unit in 28nm FD-SOI CMOS for Keyword Spotting Application.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Jyotishman Saikia, Amitesh Sridharan, Injune Yeo, Shreyas K. Venkataramanaiah, Deliang Fan, Jae-Sun Seo	FP-IMC: A 28nm All-Digital Configurable Floating-Point In-Memory Computing Macro.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Adrian Gehl, Kyrylo Cherniak, Olga Kharko, Gianluca Marin, Petru Bacinski, Frank Prämaßing, Bernhard Wicht	A 2-8V Vin 670mA Scalable Multi-Ratio SC DCDC Converter for MCU Integration in 28nm CMOS Achieving 91% Peak Efficiency.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Sohum Datta, Brian C. Richards, Harrison Liew, Youbin Kim, Daniel Sun 0005, Jan M. Rabaey	HDBinaryCore: A 28nm 2048-bit Hyper-Dimensional biosignal classifier achieving 25 nJ/prediction for EMG hand-gesture recognition.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Siddharth Das, McKenzie van der Hagen, Swarali Patil, Cagri Erbagci, Brandon Lucia, Ken Mai	A 10.33 μJ/encryption Homomorphic Encryption Engine in 28nm CMOS with 4096-degree 109-bit Polynomials for Resource-Constrained IoT Clients.	ESSCIRC	2023	DBLP DOI BibTeX RDF
16	Xiaoyu Feng, Wenyu Sun, Shupei Fan, Chen Tang, Yixiong Yang, Jinshan Yue, Qingmin Liao, Huazhong Yang, Yongpan Liu	A Demonstration Platform for Large-Scaled Point Cloud Network Based on 28nm 2D/3D Unified Sparse Convolution Accelerator.	AICAS	2023	DBLP DOI BibTeX RDF
16	Dexuan Huo, Jilin Zhang, Xinyu Dai, Jian Zhang, Chunqi Qian, Kea-Tiong Tang, Hong Chen 0002	ANP-G: A 28nm 1.04pJ/SOP Sub-mm2 Spiking and Back-propagation Hybrid Neural Network Asynchronous Olfactory Processor Enabling Few-shot Class-incremental On-chip Learning.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	Tai-Hao Wen, Je-Min Hung, Hung-Hsi Hsu, Yuan Wu 0009, Fu-Chun Chang, Chung-Yuan Li, Chih-Han Chien, Chin-I Su, Win-San Khwa, Jui-Jen Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Mon-Shu Ho, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang	A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	Yang Wang, Yubin Qin, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Leibo Liu, Shaojun Wei, Yang Hu 0001, Shouyi Yin	A 28nm 77.35TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary Computing.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	Jeongwon Choe, Youngjoo Lee	A 2.35 Gb/s/mm2 (7440, 6696) NB-LDPC Decoder over GF(32) using Memory-Reduced Column-Wise Trellis Min-Max Algorithm in 28nm CMOS Technology.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	Luca Ricci, Lorenzo Scaletti, Gabriele Bè, Michele Rocco, Luca Bertulessi, Salvatore Levantino, Andrea L. Lacaita, Carlo Samori, Andrea Bonfanti	A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	N. Grossier, Fabio Disegni, A. Ventre, A. Barcella, R. Mariani, V. Marino, S. Mazzara, A. Scavuzzo, M. Bansal, B. Soni, A. Anand, S. Banzal, D. Joshi, R. Narwal, M. Niranjani, K. Trivedi, P. Ferreira, Rossella Ranica, L. Vullo, Andreia Cathelin, Alfonso Maurelli, S. Pezzini, M. Peri	ASIL-D automotive-grade microcontroller in 28nm FD-SOI with full-OTA capable 21MB embedded PCM memory and highly scalable power management.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	Joydeep Basu, Sachin Taneja, Viveka Konandur Rajanna, Tianqi Wang, Massimo Alioto	ECC-Less Multi-Level SRAM Physically Unclonable Function and 127% PUF-to-Memory Capacity Ratio with No Bitcell Modification in 28nm.	VLSI Technology and Circuits	2023	DBLP DOI BibTeX RDF
16	Raphael Steinhoff, Steffen Moll, Sebastian Kaltenstadler, Albrecht Rothermel	Retina Stimulator with Channel Dependent Arbitrary Waveforms in 28nm CMOS Process.	NEWCAS	2023	DBLP DOI BibTeX RDF
16	Vivek Parmar, Sandeep Kaur Kingra, Deepak Verma, Digamber Pandey, Giuseppe Piccolboni, Alessandro Bricalli, Amir Regev, Gabriel Pares, Laurent Grenouillet, Jean-François Nodin, Manan Suri	Demonstration of SMT-reflow Immune and SCA-resilient PUF on 28nm RRAM device array.	IMW	2023	DBLP DOI BibTeX RDF
16	Alessandro Grossi, Matteo Coppetta, Stefano Aresu, Andreas Kux, Thomas Kern, Robert Strenz	28nm Data Memory with Embedded RRAM Technology in Automotive Microcontrollers.	IMW	2023	DBLP DOI BibTeX RDF
16	Chao Fan, Ya Zhao, Yanlong Zhang, Jun Yin, Pui-In Mak, Guohe Zhang, Li Geng	A 13.5-to-28.8GHz 72.3%-Locking Range Multi-Phase Injection-Locked Frequency Tripler with Improved Output Power and Wideband Subharmonic-Spur Rejection in 28nm CMOS.	CICC	2023	DBLP DOI BibTeX RDF
16	Yixiong Yang, Ruoyang Liu, Chenhan Wei, Wenxun Wang, Wenyu Sun, Jinshan Yue, Huazhong Yang, Yongpan Liu	A 28nm 1.07TFLOPS/mm2 Dynamic-Precision Training Processor with Online Dynamic Execution and Multi- Level-Aligned Block-FP Processing.	CICC	2023	DBLP DOI BibTeX RDF
16	Yuxuan Du, Haitao Ge, Zhuo Chen, Kaize Zhou, Zhengguo Shen, Weiwei Shan	A 28nm All-Digital, 1.92-7.32mV/LSB, 0.5-2GS/s sample rate, 0-latency Voltage Sensor with Dynamic PVT Calibration for Wide-range Adaptive Voltage Scaling.	CICC	2023	DBLP DOI BibTeX RDF
16	Cai Li, Haochang Zhi, Long Chen, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Weiwei Shan	A 608nW Near-Microphone Keyword-Spotting Chip Using Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN in 28nm CMOS.	CICC	2023	DBLP DOI BibTeX RDF
16	Ariane De Vroede, Patrick Reynaert	A $4\times 4$ 607GHz Harmonic Injection-Locked Receiver Array Achieving $4.4\text{pW}/\surd\text{Hz}$ NEP in 28nm CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Kai Sheng, Weixin Gai, Zeze Feng, Haowei Niu, Bingyi Ye, Hang Zhou	A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Oian Chen, Yuan Liang, Chirn Chye Boon, Oing Liu	A Single-Channel 10GS/s 8b>36.4d8 SNDR Time-Domain ADC Featuring Loop-Unrolled Asynchronous Successive Approximation in 28nm CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Jilin Zhang, Dexuan Huo, Jian Zhang, Chunqi Qian, Qi Liu, Liyang Pan, Zhihua Wang, Ning Qiao, Kea-Tiong Tang, Hong Chen 0002	ANP-I: A 28nm 1.5pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-O.1 μJ/Sample On-Chip Learning for Edge-AI Applications.	ISSCC	2023	DBLP DOI BibTeX RDF
16	I-Ting Lin, Zih-Sing Fu, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang	A 28nm 142mW Motion-Control SoC for Autonomous Mobile Robots.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Bingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He	A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang 0014, Huazhong Yang, Yongpan Liu, Ming Liu 0022	A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Cheng-Yan Du, Chieh-Fu Tsai, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Chia-Hsiang Yang	A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Jiaxiang Li, Yun Yin, Hang Chen, Jie Lin, Yicheng Li, Xianglong Jia, Zhen Hu, Xiuyin Zhang, Hongtao Xu	A 4.1 W Quadrature Doherty Digital Power Amplifier with 33.6% Peak PAE in 28nm Bulk CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Fengbin Tu, Yiqi Wang 0005, Zihan Wu 0006, Weiwei Wu, Leibo Liu, Yang Hu 0001, Shaojun Wei, Shouyi Yin	TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN Acceleration.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Guiming Shi, Zhanhong Tan, Dapeng Cao, Jingwei Cai, Wuke Zhang, Yifu Wu, Kaisheng Ma	A 28nm 68MOPS 0.18\mu\mathrm{J}/\text{Op}$ Paillier Homomorphic Encryption Processor with Bit-Serial Sparse Ciphertext Computing.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Zhiheng Yue, Yang Wang, Huizheng Wang, Yabing Wang, Ruiqi Guo, Limei Tang, Leibo Liu, Shaojun Wei, Yang Hu 0001, Shouyi Yin	CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Hao Cai, Zhong-Jian Bian, Yaoru Hou, Yongliang Zhou, Jia-Le Cui, Yanan Guo 0004, Xiaoyun Tian, Bo Liu 0019, Xin Si, Zhen Wang, Jun Yang 0006, Weiwei Shan	A 28nm 2Mb STT-MRAM Computing-in-Memory Macro with a Refined Bit-Cell and 22.4 - 41.5TOPS/W for AI Inference.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Fengbin Tu, Zihan Wu 0006, Yiqi Wang 0005, Weiwei Wu, Leibo Liu, Yang Hu 0001, Shaojun Wei, Shouyi Yin	MuITCIM: A 28nm $2.24 \mu\mathrm{J}$/Token Attention-Token-Bit Hybrid Sparse Digital CIM-Based Accelerator for Multimodal Transformers.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Wenyu Sun, Xiaoyu Feng, Chen Tang, Shupei Fan, Yixiong Yang, Jinshan Yue, Huazhong Yang, Yongpan Liu	A 28nm 2D/3D Unified Sparse Convolution Accelerator with Block-Wise Neighbor Searcher for Large-Scaled Voxel-Based Point Cloud Network.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Shiwei Liu, Peizhe Li, Jinshan Zhang 0006, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu	A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Bo Wang, Chen Xue, Zhongyuan Feng, Zhaoyang Zhang, Han Liu, Lizheng Ren, Xiang Li, Anran Yin, Tianzhu Xiong, Yeyang Xue, Shengnan He, Yuyao Kong, Yongliang Zhou, An Guo, Xin Si, Jun Yang 0006	A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Sungjin Park, Sunwoo Lee, Jeongwoo Park, Hyeong-Seok Choi, Dongsuk Jeon	A0.81 mm2 740μW Real-Time Speech Enhancement Processor Using Multiplier-Less PE Arrays for Hearing Aids in 28nm CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Weisen Zeng, Li Gao, Ningzheng Sun, Hongtao Xu, Quan Xue, Xiuyin Zhang	A 19.7-to-43.8GHz Power Amplifier with Broadband Linearization Technique in 28nm Bulk CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	An Guo, Xin Si, Xi Chen, Fangyuan Dong, Xingyu Pu, Dongqi Li, Yongliang Zhou, Lizheng Ren, Yeyang Xue, Xueshan Dong, Hui Gao, Yiran Zhang, Jingmin Zhang, Yuyao Kong, Tianzhu Xiong, Bo Wang, Hao Cai, Weiwei Shan, Jun Yang 0006	A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Yanshu Guo, Yaoyu Li, Wenqiang Huang, Songyao Tan, Qichun Liu, Tiefu Li, Ning Deng 0008, Zhihua Wang 0001, Yuanjin Zheng, Hanjun Jiang	A Polar-Modulation-Based Cryogenic Qubit State Controller in 28nm Bulk CMOS.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Yifan He, Haikang Diao, Chen Tang, Wenbin Jia, Xiyuan Tang, Yuan Wang 0001, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu	A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Wan Kim, Hyun-Gi Seok, Geunhaeng Lee, Sinyoung Kim, Jae-Keun Lee, Chanho Kim, Wonkang Kim, Wonjun Jung, Youngsea Cho, Seungyong Bae, Jongpil Cho, Hyeokju Na, Byoungjoong Kang, Honggul Han, Hyeonuk Son, Chiyoung Ahn, Hoon Kang, Sukjin Jung, Hyukjun Sung, Yeongdae Kim, Donghan Kim, Dongsu Kim, Ji-Seon Paek, Seunghyun Oh, Jongwoo Lee, Sungung Kwak, Joonsuk Kim	A Fully Integrated IEEE 802.15.4/4z-Compliant 6.5-to-8GHz UWB System-on-Chip RF Transceiver Supporting Precision Positioning in a CMOS 28nm Process.	ISSCC	2023	DBLP DOI BibTeX RDF
16	Yunhong Kim, Yunhwan Jung, Haesik Sul, Kyoungmin Koh	A 1/1.12-inch $1.4\mu\mathrm{m}$-Pitch 50Mpixel 65/28nm Stacked CMOS Image Sensor using Mulitple Sampling.	ISCAS	2023	DBLP DOI BibTeX RDF
16	Yuanxin Tian, Yuejun Zhang, Huihong Zhang, Liang Wen, Pengjun Wang, Zhiyi Li	An Architecture of a Single-Event Tolerant D Flip-flop Using Full-Custom Design in 28nm Process.	ASICON	2023	DBLP DOI BibTeX RDF
16	Yuchao Zhang, Zihao Xuan, Yi Kang	A 28nm 15.09nJ/inference Neuromorphic Processor with SRAM-Based Charge Domain in-Memory-Computing.	ASICON	2023	DBLP DOI BibTeX RDF
16	Jun Chen, Fengyi Mei, Mingzhe Liu, Yongzhen Chen, Jiangfeng Wu	A 32GS/s 7bit TI-SAR ADC in 28nm for 32Gb/s ADC-Based SerDes Receiver.	ASICON	2023	DBLP DOI BibTeX RDF
16	Peifang Wu, Yan Liu, Xi Feng, Hao Xu 0005, Na Yan	A Vernier Time-to-Digital Converter with 1.5ps Resolution for an All-Digital Phase Locked Loop in 28nm CMOS.	ASICON	2023	DBLP DOI BibTeX RDF
16	Bingrong Lyu, Fan Ye 0001, Junyan Ren	A 6-Gb/s Wireline Transmitter Design with 3-Tap FFE in 28nm CMOS Technology.	ASICON	2023	DBLP DOI BibTeX RDF
16	Vidhi Gandhi, Yashvi Patel, Bhavesh Soni, Gaurav Joshi	Power Budget Improvement Using Floorplan Methodologies In Lower(28nm) Technology Node.	iSES	2023	DBLP DOI BibTeX RDF
16	Vishal Mahida, Bhavesh Soni, Nilesh Ranpura	Performance Enhancement of "ARP Block" using 28nm Technology node.	iSES	2023	DBLP DOI BibTeX RDF
16	Zayyir Ulric Cornelio, Paolo Resurreccion, Maria Theresa G. de Leon, Marc D. Rosales, John Richard E. Hizon	An EEG Analog Front-End Unit for Wearable Applications Implemented in 28nm FD-SOI.	ISOCC	2023	DBLP DOI BibTeX RDF
16	Hedi Wang, Zengwei Wang, Yaolei Li, Chen Tang, Jinxu Gao, Huazhong Yang, Yongpan Liu	A 28nm 386.5GOPS/W Coarse-Grained DSP Using Configurable Processing Elements for Always-on Computation with FPGA Implementation.	A-SSCC	2023	DBLP DOI BibTeX RDF
16	Pingda Guan, Haikun Jia, Wei Deng 0001, Ruichang Ma, Mingxing Deng, Jiamin Xue, Angxiao Yan, Shiyan Sun, Zhihua Wang 0001, Baoyong Chi	A Fully Integrated Bit-to-Bit 24/48Gb/s QPSK/16-QAM D-Band Transceiver with Mixed-Signal Baseband in 28nm CMOS Technology.	A-SSCC	2023	DBLP DOI BibTeX RDF
16	Yubin Qin, Yang Wang 0089, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Yang Zhou, Yuanqi Fan, Jingchuan Wei, Tianbao Chen, Leibo Liu, Shaojun Wei, Yang Hu 0001, Shouyi Yin	A 28nm 49.7TOPS/W Sparse Transformer Processor with Random-Projection-Based Speculation, Multi-Stationary Dataflow, and Redundant Partial Product Elimination.	A-SSCC	2023	DBLP DOI BibTeX RDF
16	Zhengguo Shen, Junyi Qian, Keran Li, Ziyu Li, Lishuo Deng, Weiwei Shan	TEPD: A Compound Timing Detection of Both Data-Transition and Path-Activation for Reliable In-Situ Timing Error Detection and Correction in 28nm CMOS.	A-SSCC	2023	DBLP DOI BibTeX RDF