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Publication years (Num. hits)
1966-1980 (16) 1981-1983 (19) 1984-1985 (33) 1986 (15) 1987 (19) 1988 (26) 1989 (19) 1990 (32) 1991-1992 (31) 1993 (20) 1994 (29) 1995 (75) 1996 (71) 1997 (84) 1998 (265) 1999 (281) 2000 (289) 2001 (278) 2002 (301) 2003 (374) 2004 (443) 2005 (498) 2006 (556) 2007 (564) 2008 (542) 2009 (475) 2010 (291) 2011 (261) 2012 (270) 2013 (303) 2014 (312) 2015 (282) 2016 (126) 2017 (268) 2018 (269) 2019 (312) 2020 (254) 2021 (265) 2022 (284) 2023 (348) 2024 (48)
Publication types (Num. hits)
article(1103) book(5) data(2) incollection(13) inproceedings(8023) phdthesis(48) proceedings(54)
Venues (Conferences, Journals, ...)
CICC(3566) FCCM(1536) CoRR(122) DAC(113) FPL(82) IEEE Trans. Comput. Aided Des....(67) IEEE Trans. Very Large Scale I...(63) DATE(58) ISCAS(49) FPGA(48) ICCAD(42) Sensors(42) IPDPS(37) ASP-DAC(36) VLSI Design(35) ICCD(32) More (+10 of total 1466)
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The graphs summarize 3407 occurrences of 2001 keywords

Results
Found 9248 publication records. Showing 9248 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
64Jennifer Y.-L. Lo, Wu-An Kuo, Allen C.-H. Wu, TingTing Hwang A Custom-Cell Identification Method for High-Performance Mixed Standard/Custom-Cell Designs. Search on Bibsonomy DATE The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
58Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Custom-instruction synthesis for extensible-processor platforms. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
57Laurence Bull, Peter Stañski, David Squire Content extraction signatures using XML digital signatures and custom transforms on-demand. Search on Bibsonomy WWW The full citation details ... 2003 DBLP  DOI  BibTeX  RDF Net framework XML signature API, XML signature custom transforms, content extraction signatures, XML signatures, dynamic signature verification
52Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha A Synthesis Methodology for Hybrid Custom Instruction and Coprocessor Generation for Extensible Processors. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
52Vasian Cepa, Mira Mezini Declaring and Enforcing Dependencies Between .NET Custom Attributes. Search on Bibsonomy GPCE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
52Michael Gansen, Frank Richter, Oliver Weiss, Tobias G. Noll A Datapath Generator for Full-Custom Macros of Iterative Logic Arrays. Search on Bibsonomy ASAP The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
52Andrew Chang 0001, William J. Dally Explaining the gap between ASIC and custom power: a custom perspective. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF custom circuits, normalized metrics, low power, energy efficiency, ASIC, EDA, technology scaling
51Ruchir Puri, William H. Joyner, Shekhar Borkar, Ty Garibay, Jonathan Lotz, Robert K. Montoye Custom is from Venus and synthesis from Mars. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF IC synthesis techniques, custom IC design, VLSI design
50Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. Search on Bibsonomy DATE The full citation details ... 1998 DBLP  DOI  BibTeX  RDF Gallium Arsenide automated layout generation system, GaAs VLSI design, power supply and ground distribution model, full-custom cell layout style, full-custom layouts of very high speed circuits, cell library builder, random logic macrocell generator, iterative logic array generator
46Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. Search on Bibsonomy FPGA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF eembc, soft, viram, fpga, adaptable, vector, data parallel, processor, simd
46Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors. Search on Bibsonomy VLSI Design The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
46Bruce R. Childers, Jack W. Davidson Custom Wide Counterflow Pipelines for High-Performance Embedded Applications. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Counterflow pipelines, automatic architectural synthesis, application-specific processors
46Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Synthesis of Application-Specific Heterogeneous Multiprocessor Architectures Using Extensible Processors. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
45Naren Datha, Tanuja Joshi, Joseph Joy, Vibhuti S. Sengar Custom local search. Search on Bibsonomy GIS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF custom location search, robust parsing, geocoding
45Tao Li 0008, Zhigang Sun, Wu Jigang, Xicheng Lu Fast enumeration of maximal valid subgraphs for custom-instruction identification. Search on Bibsonomy CASES The full citation details ... 2009 DBLP  DOI  BibTeX  RDF ISE identification, custom processors, maximal subgraph
45Emre Özer 0001, Andy Nisbet, David Gregg A stochastic bitwidth estimation technique for compact and low-power custom processors. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Bit-width analysis, custom hardware, FPGA, statistical estimation, extreme value theory
45Hai Lin 0004, Yunsi Fei Utilizing custom registers in application-specific instruction set processors for register spills elimination. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF custom register, ASIP, register file
45Laurence Bull, David McG. Squire XML Signature Extensibility Using Custom Transforms. Search on Bibsonomy WISE The full citation details ... 2004 DBLP  DOI  BibTeX  RDF XML Signature Custom Transforms, XML Signatures
45José Carlos Alves, João Canas Ferreira, C. Albuquerque, José Fernando Oliveira, José Soeiro Ferreira, José Silva Matos FAFNER-Accelerating Nesting Problems with FPGAs. Search on Bibsonomy FCCM The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Custom computing, nesting problems, FPGAs
45Neil W. Bergmann, Yuk Ying Chung Video Compression on FPGA-Based Custom Computers. Search on Bibsonomy ICIP (1) The full citation details ... 1997 DBLP  DOI  BibTeX  RDF FPGA-based custom computers, 2D DCT algorithms, Scalable Parallel Architecture for Concurrency Experiments, field programmable gate arrays, field programmable gate array, video compression, experimental result, SPACE, workstation, distributed arithmetic, super-computer, processing speed
45Jason L. Dedrick, Sean Xin Xu, Kevin Zhu Information Technology and the Number of Suppliers in a Supply Chain: Is There a Relationship? Search on Bibsonomy HICSS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF supply chain relationships, number of suppliers, electronic procurement, custom goods, systems integration, transaction costs economics
41Nabeel Shirazi, Al Walters, Peter M. Athanas Quantitative analysis of floating point arithmetic on FPGA based custom computing machines. Search on Bibsonomy FCCM The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
41Rick Amerson, Richard J. Carter, W. Bruce Culbertson, Philip Kuekes, Greg Snider Teramac-configurable custom computing. Search on Bibsonomy FCCM The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
41Tao Li 0008, Wu Jigang, Siew Kei Lam, Thambipillai Srikanthan, Xicheng Lu Efficient Heuristic Algorithm for Rapid Custom-Instruction Selection. Search on Bibsonomy ACIS-ICIS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
41Liana Razmerita, Niels Bjørn-Andersen Towards Ubiquitous e-Custom Services. Search on Bibsonomy Web Intelligence The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
41Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths. Search on Bibsonomy ICCD The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
40Elizeu Santos-Neto, Samer Al-Kiswany, Nazareno Andrade, Sathish Gopalakrishnan, Matei Ripeanu enabling cross-layer optimizations in storage systems with custom metadata. Search on Bibsonomy HPDC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF custom metadata, cross-layer optimization, distributed storage systems
40David G. Chinnery, Kurt Keutzer Closing the power gap between ASIC and custom: an ASIC perspective. Search on Bibsonomy DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF power, energy, custom, ASIC, comparison, standard cell
40Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro C. Diniz Coarse-Grain Pipelining on Multiple FPGA Architectures. Search on Bibsonomy FCCM The full citation details ... 2002 DBLP  DOI  BibTeX  RDF Coarse-grain Pipelining, FPGA-based Custom Computing Machines, Parallelizing Compiler Analysis Techniques
40Li-C. Wang, Magdy S. Abadir On Efficiently Producing Quality Tests for Custom Circuits in PowerPCTM Microprocessors. Search on Bibsonomy J. Electron. Test. The full citation details ... 2000 DBLP  DOI  BibTeX  RDF custom circuits, high level circuit extraction, ATPG, DFT, time-to-market
40David G. Chinnery, Kurt Keutzer Closing the gap between ASIC and custom: an ASIC perspective. Search on Bibsonomy DAC The full citation details ... 2000 DBLP  DOI  BibTeX  RDF custom, ASIC, comparison, clock frequency, clock speed
40Bernardo Kastrup, Arjan Bink, Jan Hoogerbrugge ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator. Search on Bibsonomy FCCM The full citation details ... 1999 DBLP  DOI  BibTeX  RDF XPLA, compilers, static-analysis, computer-architecture, reconfigurable-computing, compiler-optimizations, hardware-acceleration, programmable-logic, CPLD, custom-instructions
40Eric Persoon A Pipelined Image Analysis System Using Custom Integrated Circuits. Search on Bibsonomy IEEE Trans. Pattern Anal. Mach. Intell. The full citation details ... 1988 DBLP  DOI  BibTeX  RDF pipelined image analysis system, custom integrated circuits, iconic image-processing, mask generation, programmable image delay, subsample filtering, computer vision, computerised picture processing, pipeline processing, shape recognition, digital integrated circuits, computer vision system
35Kubilay Atasu, Can C. Özturan, Günhan Dündar, Oskar Mencer, Wayne Luk CHIPS: Custom Hardware Instruction Processor Synthesis. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
35Pan Yu, Tulika Mitra Disjoint Pattern Enumeration for Custom Instructions Identification. Search on Bibsonomy FPL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
35Bita Gorjiara, Daniel D. Gajski Custom Processor Design Using NISC: A Case-Study on DCT algorithm. Search on Bibsonomy ESTIMedia The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
35Antonio Blotti, Roberto Saletti Ultralow-power adiabatic circuit semi-custom design. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
35Chris Gniady, Babak Falsafi Speculative Sequential Consistency with Little Custom Storage. Search on Bibsonomy IEEE PACT The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
35Emery D. Berger, Benjamin G. Zorn, Kathryn S. McKinley Reconsidering custom memory allocation. Search on Bibsonomy OOPSLA The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
35Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs? Search on Bibsonomy VTS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
34Huynh Phung Huynh, Tulika Mitra Runtime Adaptive Extensible Embedded Processors - A Survey. Search on Bibsonomy SAMOS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
34Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha A Scalable Synthesis Methodology for Application-Specific Processors. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
34Maged M. Michael, Ashwini K. Nanda, Beng-Hong Lim Coherence Controller Architectures for Scalable Shared-Memory Multiprocessors. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 1999 DBLP  DOI  BibTeX  RDF Coherence controller, protocol processor, multiprocessor, shared memory
34Maged M. Michael, Ashwini K. Nanda, Beng-Hong Lim, Michael L. Scott Coherence Controller Architectures for SMP-Based CC-NUMA Multiprocessors. Search on Bibsonomy ISCA The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
34Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu Transistor sizing of custom high-performance digital circuits with parametric yield considerations. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF custom circuits, optimization
34João Miguel Ferro, Fernando J. Velez Routing in a Custom-Made IEEE 802.11E Simulator. Search on Bibsonomy World Congress on Engineering (Selected Papers) The full citation details ... 2008 DBLP  DOI  BibTeX  RDF IEEE 802.11E Simulator, Custom-Made, multi-hop environment, Routing, network simulation
34Jayanta Bhadra, Andrew K. Martin, Jacob A. Abraham A Formal Framework for Verification of Embedded Custom Memories of the Motorola MPC7450 Microprocessor. Search on Bibsonomy Formal Methods Syst. Des. The full citation details ... 2005 DBLP  DOI  BibTeX  RDF efficient memory models, embedded memory verification, custom circuit verification, equivalence checking, symbolic trajectory evaluation
34GuangWei Zou, Xiang Liu An Efficient Approach to Custom Instruction Set Generation. Search on Bibsonomy RTCSA The full citation details ... 2005 DBLP  DOI  BibTeX  RDF Major Block, Profiling, Hardware Acceleration, ASIPs, Custom Instruction
34Javier Ramírez 0001, Uwe Meyer-Bäse, Fred J. Taylor, Antonio García 0001, Antonio Lloris-Ruíz Design and Implementation of High-Performance RNS Wavelet Processors Using Custom IC Technologies. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 2003 DBLP  DOI  BibTeX  RDF RNS arithmetic, custom integrated circuit, field-programmable logic devices, discrete wavelet transform
34Barbara Cannas, Gianni Celli, Alessandra Fanni, Fabrizio Pilo Automated Recurrent Neural Network Design of a Neural Controller in a Custom Power Device. Search on Bibsonomy J. Intell. Robotic Syst. The full citation details ... 2001 DBLP  DOI  BibTeX  RDF custom power protection device, universal Tabu Search, recurrent neural networks, neural controller
34Apostolos Dollas, Euripides Sotiriades, Apostolos Emmanouelides Architecture and Design of GE1, a FCCM for Golomb Ruler Derivation. Search on Bibsonomy FCCM The full citation details ... 1998 DBLP  DOI  BibTeX  RDF FPGA, Architecture, Custom, Golomb Ruler
34Venkat Thanvantri, Sartaj Sahni Optimal folding of standard and custom cells. Search on Bibsonomy ACM Trans. Design Autom. Electr. Syst. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF custom cell folding, standard cell folding, layout area
33Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Morteza Saheb Zamani An architecture framework for an adaptive extensible processor. Search on Bibsonomy J. Supercomput. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF Reconfigurable functional unit, Profiling, Temporal partitioning, Custom instruction, Extensible processor, Similarity detection
33Guy G. Lemieux, Tarek A. El-Ghazawi Designing with extreme parallelism. Search on Bibsonomy FPGA The full citation details ... 2008 DBLP  DOI  BibTeX  RDF custom compute engine, high-level electronic design, FPGA, parallel processing, reconfigurable computing, hardware description language
33Beng-Hong Lim, Philip Heidelberger, Pratap Pattnaik, Marc Snir Message Proxies for Efficient, Protected Communication on SMP Clusters. Search on Bibsonomy HPCA The full citation details ... 1997 DBLP  DOI  BibTeX  RDF message proxies, protected communication, custom hardware, IBM Model G30 SMPs, cache-miss latency, cache-update mechanism, performance model, multiprocessing systems, symmetric multiprocessor clusters
30Jackson H. C. Yeung, C. C. Tsang, Kuen Hung Tsoi, Bill S. H. Kwan, Chris C. C. Cheung, Anthony P. C. Chan, Philip Heng Wai Leong Map-reduce as a Programming Model for Custom Computing Machines. Search on Bibsonomy FCCM The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
30Christian Plessl, Marco Platzner Custom Computing Machines for the Set Covering Problem. Search on Bibsonomy FCCM The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
30Mark J. Boyd, Tracy Larrabee A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems. Search on Bibsonomy FCCM The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
30W. Bruce Culbertson, Rick Amerson, Richard J. Carter, Philip Kuekes, Greg Snider Defect tolerance on the Teramac custom computer. Search on Bibsonomy FCCM The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
30Neil W. Bergmann, Yuk Ying Chung, Bernard K. Gunther Efficient implementation of the DCT on custom computers. Search on Bibsonomy FCCM The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
30Glenn H. Chapman, Benoit Dufort Laser defect correction applications to FPGA based custom computers. Search on Bibsonomy FCCM The full citation details ... 1997 DBLP  DOI  BibTeX  RDF
30Kazuhiro Hayashi, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhisa Yamada, Naohisa Ohta Reconfigurable real-time signal transport system using custom FPGAs. Search on Bibsonomy FCCM The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
30Wayne Luk A declarative approach to incremental custom computing. Search on Bibsonomy FCCM The full citation details ... 1995 DBLP  DOI  BibTeX  RDF
29Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin Reconfigurable custom floating-point instructions (abstract only). Search on Bibsonomy FPGA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF emips, reconfigurable, extension, floating-point, partial reconfiguration
29Siddharth Garg, Diana Marculescu, Radu Marculescu Custom feedback control: enabling truly scalable on-chip power management for MPSoCs. Search on Bibsonomy ISLPED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF distributed control, dynamic voltage/frequency scaling
29Hai Lin 0004, Yunsi Fei Exploring custom instruction synthesis for application-specific instruction set processors with multiple design objectives. Search on Bibsonomy ISLPED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF asips, multi-objective design
29Vinayak Honkote, Baris Taskin PEEC based parasitic modeling for power analysis on custom rotary rings. Search on Bibsonomy ISLPED The full citation details ... 2010 DBLP  DOI  BibTeX  RDF resonant clocking, simulation, modeling, interconnect
29Vinayak Honkote, Baris Taskin Custom rotary clock router. Search on Bibsonomy ICCD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
29Kang Zhao, Jinian Bian, Sheqin Dong, Yang Song 0002, Satoshi Goto HyMacs: hybrid memory access optimization based on custom-instruction scheduling. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2008 DBLP  DOI  BibTeX  RDF asip, cad algorithm, hardware/software co-design
29Nagaraju Pothineni, Anshul Kumar, Kolin Paul A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions. Search on Bibsonomy VLSI Design The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
29Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Maziar Goudarzi Interactive presentation: Generating and executing multi-exit custom instructions for an adaptive extensible processor. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
29Su-Shin Ang, George A. Constantinides, Wayne Luk, Peter Y. K. Cheung A Hybrid Memory Sub-system for Video Coding Applications. Search on Bibsonomy FCCM The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
29Alin Jula, Lawrence Rauchwerger Custom Memory Allocation for Free. Search on Bibsonomy LCPC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
29Lorenz Huelsbergen Fast evolution of custom machine representations. Search on Bibsonomy Congress on Evolutionary Computation The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Pan Yu, Tulika Mitra Satisfying real-time constraints with custom instructions. Search on Bibsonomy CODES+ISSS The full citation details ... 2005 DBLP  DOI  BibTeX  RDF real-time systems, execution time, instruction-set extensions, worst-case, customizable processors
29Krishnan Srinivasan, Karam S. Chatha ISIS: A Genetic Algorithm Based Technique for Custom On-Chip Interconnection Network Synthesis. Search on Bibsonomy VLSI Design The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Shannon Xu, Thomas R. Dean Transforming Embedded Java Code into Custom Tags. Search on Bibsonomy SCAM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Shawn Phillips, Scott Hauck Automating the Layout of Reconfigurable Subsystems Using Circuit Generators. Search on Bibsonomy FCCM The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
29Rick Mugridge Test Driving Custom Fit Fixtures. Search on Bibsonomy XP The full citation details ... 2004 DBLP  DOI  BibTeX  RDF Customer testing, tdd, it
29Marcos Martínez Peiró, Francisco José Ballester-Merelo, Guillermo Payá Vayá, Ricardo José Colom-Palero, Rafael Gadea Gironés, J. Belenguer FPGA Custom DSP for ECG Signal Analysis and Compression. Search on Bibsonomy FPL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
29Dan Kuyper, Hesham H. Ali, Amr M. Mohamed, Steven H. Hinrichs Identification of Mycobacterium Species Using Curated Custom Databases. Search on Bibsonomy IPDPS The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
29Pan Yu, Tulika Mitra Scalable custom instructions identification for instruction-set extensible processors. Search on Bibsonomy CASES The full citation details ... 2004 DBLP  DOI  BibTeX  RDF subgraph enumeration algorithm, ASIPs, instruction-set extensions, customizable processors
29Juan Antonio Carballo, Jeffrey L. Burns, Seung-Moon Yoo, Ivan Vo, V. Robert Norman A semi-custom voltage-island technique and its application to high-speed serial links. Search on Bibsonomy ISLPED The full citation details ... 2003 DBLP  DOI  BibTeX  RDF island, voltage, communications, low power, links, serial
29Mihai Sima, Stamatis Vassiliadis, Sorin Cotofana, Jos T. J. van Eijndhoven, Kees A. Vissers Field-Programmable Custom Computing Machines - A Taxonomy -. Search on Bibsonomy FPL The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
29Paul P. Polanski, Robert B. Johnston International Custom as a Source of Law in Global Electronic Commerce. Search on Bibsonomy HICSS The full citation details ... 2002 DBLP  DOI  BibTeX  RDF
29Bruce R. Childers, Jack W. Davidson Custom Wide Counterflow Pipelines for High-Performance Embedded Applications. Search on Bibsonomy IEEE PACT The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
29Andrew A. Duncan, David C. Hendry, Peter Gray An Overview of the COBRA-ABS High Level Synthesis System for Multi-FPGA Systems. Search on Bibsonomy FCCM The full citation details ... 1998 DBLP  DOI  BibTeX  RDF
29James B. Peterson, Peter M. Athanas High-speed 2-D convolution with a custom computing machine. Search on Bibsonomy J. VLSI Signal Process. The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
29R. Larry Dooley, G. Heimke, Ajit Dingankar, E. Berg, E. Kimbrough Automated Design and Analysis System for Design of Custom Orthopedic Implants. Search on Bibsonomy IEA/AIE (Vol. 1) The full citation details ... 1988 DBLP  DOI  BibTeX  RDF LISP
28Robert Law Using student blogs for documentation in software development projects. Search on Bibsonomy ITiCSE The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
28Matthew Canton The presence table: a reactive surface for ambient connection. Search on Bibsonomy TEI The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
28Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad Mukarram Bin Tariq, Nick Feamster SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware. Search on Bibsonomy SIGCOMM The full citation details ... 2010 DBLP  DOI  BibTeX  RDF network virtualization, NetFPGA
28Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha Application-specific heterogeneous multiprocessor synthesis using extensible processors. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
28Trieu C. Chieu, Florian Pinel, Jih-Shyr Yih Unified Commerce Server Architecture for Large Number of Enterprise Stores. Search on Bibsonomy CEC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
28Fei Sun, Srivaths Ravi 0001, Anand Raghunathan, Niraj K. Jha A Scalable Application-Specific Processor Synthesis Methodology. Search on Bibsonomy ICCAD The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
28Nianjun Zhou, Da Peng An, Liang-Jie Zhang, Chih-Hong Wong Leveraging Cloud Platform for Custom Application Development. Search on Bibsonomy IEEE SCC The full citation details ... 2011 DBLP  DOI  BibTeX  RDF custom application development, solution workbench, project assembly, cloud image, team collaboration, asset reuse, cloud computing, project management
28Marcio Juliato, Catherine H. Gebotys Tailoring a Reconfigurable Platform to SHA-256 and HMAC through Custom Instructions and Peripherals. Search on Bibsonomy ReConFig The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Processor Specialization, SHA-2, Cryptography, HMAC, HW/SW Partitioning, Co-Processor, Custom Instruction
28Ajay Kumar Verma, Philip Brisk, Paolo Ienne Rethinking custom ISE identification: a new processor-agnostic method. Search on Bibsonomy CASES The full citation details ... 2007 DBLP  DOI  BibTeX  RDF ISE identification, custom processors, maximal cluster
28Ilias Tagkopoulos, Charles A. Zukowski, German Cavelier, Dimitris Anastassiou A custom FPGA for the simulation of gene regulatory networks. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2003 DBLP  DOI  BibTeX  RDF custom mixed signal FPGA, genetic pathways, gene regulatory networks
28Pedro C. Diniz, Joonseok Park Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-based Data Structures. Search on Bibsonomy FCCM The full citation details ... 2003 DBLP  DOI  BibTeX  RDF Custom Computing, Data search and Data Reorganization Engines, Hardware support for Pointer Operations, Field-Programmable- Gate-Arrays (FPGAs)
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