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Searching for DFLAP with no syntactic query expansion in all metadata.

Publication years (Num. hits)
1996 (2)
Publication types (Num. hits)
inproceedings(2)
Venues (Conferences, Journals, ...)
ICCD(1) ICIP (2)(1)
Authors
N. Bhavanishankar(2) Narayanan Vijaykrishnan(2) N. Ranganathan(1) Nagarajan Ranganathan(1)
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Found 2 publication records. Showing 2 according to the selection in the facets
Hits ?▲ Authors Title Venue Year Link Author keywords
69N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar A VLSI array architecture with dynamic frequency clocking. Search on Bibsonomy ICCD The full citation details ... 1996 DBLP  DOI  BibTeX  RDF VLSI array architecture, dynamic frequency clocking, linear VLSI array processor, DFLAP, power requirements, image processing, VLSI, throughput
46Narayanan Vijaykrishnan, Nagarajan Ranganathan, N. Bhavanishankar DFLAP: a dynamic frequency linear array processor. Search on Bibsonomy ICIP (2) The full citation details ... 1996 DBLP  DOI  BibTeX  RDF
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