Search results for "DSPstone"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
66	Nainesh Agarwal, Nikitas J. Dimopoulos	DSPstone Benchmark of CoDeL's Automated Clock Gating Platform.	ISVLSI	2007	DBLP DOI BibTeX RDF
56	Vojin Zivojnovic, Stefan Pees, C. Schälger, Markus Willems, Rainer Schoenen, Heinrich Meyr	DSP Processor/Compiler Co-Design: A Quantitative Approach.	ISSS	1996	DBLP DOI BibTeX RDF	processor/compiler codesign, benchmarking methodology, DSPstone, fast processor simulation, SuperSim, compiled processor simulation, performance evaluation, embedded systems, digital signal processing, digital signal processing chips, LISA, top-down approach, machine description
20	Chung-Wen Huang, Kun-Yuan Hsieh, Jia-Jhe Li, Jenq Kuen Lee	Support of Paged Register Files for Improving Context Switching on Embedded Processors.	CSE (2)	2009	DBLP DOI BibTeX RDF
20	Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivastava	Code Transformations for TLB Power Reduction.	VLSI Design	2009	DBLP DOI BibTeX RDF
20	Bernhard Scholz, Bernd Burgstaller, Jingling Xue	Minimal placement of bank selection instructions for partitioned memory architectures.	ACM Trans. Embed. Comput. Syst.	2008	DBLP DOI BibTeX RDF	Partitioned boolean quadratic programming, bank selection, partitioned memory architectures
20	Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, Reiley Jeyapaul, Yunheung Paek	SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures.	ASP-DAC	2008	DBLP DOI BibTeX RDF
20	Yanqin Yang, Zili Shao, Linfeng Pan, Minyi Guo	ISOS: Space Overlapping Based on Iteration Access Patterns for Dynamic Scratch-pad Memory Management in Embedded Systems.	ICYCS	2008	DBLP DOI BibTeX RDF
20	Meng Wang 0005, Zili Shao, Hui Liu 0006, Chun Jason Xue	Minimizing Leakage Energy with Modulo Scheduling for VLIW DSP Processors.	DIPES	2008	DBLP DOI BibTeX RDF
20	Shao-Yang Wang, Rong-Guey Chang	Code size reduction by compressing repeated instruction sequences.	J. Supercomput.	2007	DBLP DOI BibTeX RDF	Repeated instruction sequence, Index table, Instruction table, Register bank, Code compression, Decompression, Instruction prefetching
20	Nainesh Agarwal, Nikitas J. Dimopoulos	Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction.	SAMOS	2007	DBLP DOI BibTeX RDF
20	Bernhard Scholz, Bernd Burgstaller, Jingling Xue	Minimizing bank selection instructions for partitioned memory architecture.	CASES	2006	DBLP DOI BibTeX RDF	PBQP, RAM allocation, bank-switching, partitioned memory architecture, compiler optimization, microcontrollers
20	Björn Franke, Michael F. P. O'Boyle	A Complete Compiler Approach to Auto-Parallelizing C Programs for Multi-DSP Systems.	IEEE Trans. Parallel Distributed Syst.	2005	DBLP DOI BibTeX RDF	conversion from sequential to parallel forms, modeling, evaluation, compilers, measurement, performance measures, interprocessor communications, arrays, real-time and embedded systems, restructuring, Parallel processors, simulation of multiple-processor systems, reverse engineering and reengineering, signal processing systems
20	Björn Franke, Michael F. P. O'Boyle	Array recovery and high-level transformations for DSP applications.	ACM Trans. Embed. Comput. Syst.	2003	DBLP DOI BibTeX RDF	Pointer conversion, high-level transformations, embedded processors, dataflow graphs
20	Björn Franke, Michael F. P. O'Boyle	Combining Program Recovery, Auto-Parallelisation and Locality Analysis for C Programs on Multi-Processor Embedded Systems.	IEEE PACT	2003	DBLP DOI BibTeX RDF
20	Viera Sipková	Efficient Variable Allocation to Dual Memory Banks of DSPs.	SCOPES	2003	DBLP DOI BibTeX RDF
20	Youtao Zhang, Jun Yang 0002	Procedural Level Address Offset Assignment of DSP Applications with Loops.	ICPP	2003	DBLP DOI BibTeX RDF
20	Dirk Fischer 0001, Jürgen Teich, Michael Thies, Ralph Weper	Efficient architecture/compiler co-exploration for ASIPs.	CASES	2002	DBLP DOI BibTeX RDF	architecture/compiler codesign, multiobjective design space exploration, ASIP, retargetable compilation
20	Björn Franke, Michael F. P. O'Boyle	Compiler Transformation of Pointers to Explicit Array Accesses in DSP Applications.	CC	2001	DBLP DOI BibTeX RDF
20	Björn Franke, Michael F. P. O'Boyle	An empirical evaluation of high level transformations for embedded processors.	CASES	2001	DBLP DOI BibTeX RDF
20	Amit Rao, Santosh Pande	Storage Assignment Optimizations to Generate Compact and Efficient Code on Embedded DSPs.	PLDI	1999	DBLP DOI BibTeX RDF