Search results for "Decoder"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
68	Jui-Hua Li, Nam Ling	An efficient video decoder design for MPEG-2 MP@ML.	ASAP	1997	DBLP DOI BibTeX RDF	video decoder design, MPEG-2 MP@ML, video decoder architecture, function-specific processing blocks, variable-length decoder, inverse 2-D discrete cosine transform, motion compensation unit, bus-monitoring model, bus arbitration schemes, DRAM accesses, motion compensation, buffer sizes
66	Matthew Collin Jordan, Ramachandran Vaidyanathan	Configurable decoders with application in fast partial reconfiguration of FPGAs.	FPGA	2008	DBLP DOI BibTeX RDF	FPGA, decoder, look-up table, configurable logic
62	Yuhuang Ye, Yuanjiu Li, Kaixiong Su	Architecture and Software Implementation of HDTV Video Decoder on a Singlechip, MPEG Decoder.	CGIV	2006	DBLP DOI BibTeX RDF	MPEG-2, HDTV, set top box, video decoder
59	Michael Dyer, David Taubman, Saeid Nooshabadi	Reduced latency arithmetic decoder for JPEG2000 block decoding.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
55	Ofer Shayevitz, Meir Feder	Universal decoding for frequency-selective fading channels.	IEEE Trans. Inf. Theory	2005	DBLP DOI BibTeX RDF
52	Nam Ling, Nien-Tsu Wang	A Real-Time Video Decoder for Digital HDTV.	J. VLSI Signal Process.	2003	DBLP DOI BibTeX RDF	HDTV video decoder, MPEG-2 MP@HL decoder, digital TV, HDTV, video decoding
48	Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu	Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
48	Yossef Steinberg	Coding for Channels With Rate-Limited Side Information at the Decoder, With Applications.	IEEE Trans. Inf. Theory	2008	DBLP DOI BibTeX RDF
48	Esa Alghonaim, Aiman El-Maleh, Mohamed Adnan Landolsi	Using input/output queues to increase LDPC decoder performance.	AICCSA	2008	DBLP DOI BibTeX RDF
48	Tuan A. Tran, Abu B. Sesay	A generalized linear quasi-ML decoder of OSTBCs for wireless communications over time-selective fading channels.	IEEE Trans. Wirel. Commun.	2004	DBLP DOI BibTeX RDF
47	Wendong Huang, Ye Wang 0007	A joint encoder-decoder framework for supporting energy efficient audio decoding.	Multim. Syst.	2009	DBLP DOI BibTeX RDF	Workload reduction, Joint encoder-decoder framework (JEDF), Joint ASP and quantization noise shaping, SOPOT, Energy efficiency
47	Chen Lei, Yiqiang Chen, Wen Ji	A complexity scalable decoder in an AVS video codec.	MoMM	2008	DBLP DOI BibTeX RDF	complexity scalable, video, encoder, decoder, AVS
47	Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto	Power-efficient LDPC code decoder architecture.	ISLPED	2007	DBLP DOI BibTeX RDF	FIFO buffer, LDPC decoder, intermediate message compression technique, message-passing schedule, clock gating
44	Nedeljko Varnica, Marc P. C. Fossorier, Aleksandar Kavcic	Augmented Belief Propagation Decoding of Low-Density Parity Check Codes.	IEEE Trans. Commun.	2007	DBLP DOI BibTeX RDF
44	Masoud Ardakani, Frank R. Kschischang	Gear-Shift Decoding.	IEEE Trans. Commun.	2006	DBLP DOI BibTeX RDF
44	Nedeljko Varnica, Marc P. C. Fossorier, Aleksandar Kavcic	Augmented Belief-Propagation Decoding of Low-Density Parity-Check Codes.	IEEE Trans. Commun.	2006	DBLP DOI BibTeX RDF
44	Masoud Ardakani, Frank R. Kschischang	Gear-Shift Decoding.	IEEE Trans. Commun.	2006	DBLP DOI BibTeX RDF
44	Aggelos Kiayias, Moti Yung	On Crafty Pirates and Foxy Tracers.	Digital Rights Management Workshop	2001	DBLP DOI BibTeX RDF
42	Yanmei Qu, Yun He, Shunliang Mei	A Novel Cost-Effective and Programmable VLSI Architecture of CAVLC Decoder for H.264/AVC.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	group-based VLD, VLSI, H.264/AVC, CAVLC
42	Junfeng Hu, Hailin Zhang	Efficient Decoder for Perfect Space-Time Codes.	CNSR	2008	DBLP DOI BibTeX RDF	Maximum likelihood (ML) decoding, multi-input multi-output (MIMO) system, perfect space-time codes
42	Mythri Alle, Jayanta Biswas, S. K. Nandy 0001	High Performance VLSI Architecture Design for H.264 CAVLC Decoder.	ASAP	2006	DBLP DOI BibTeX RDF
42	Kazunori Shimizu, Tatsuyuki Ishikawa, Takeshi Ikenaga, Satoshi Goto, Nozomu Togawa	Partially-Parallel LDPC Decoder Based on High-Efficiency Message-Passing Algorithm.	ICCD	2005	DBLP DOI BibTeX RDF
42	Hua Yang, Kenneth Rose	Encoder and decoder optimization for source-channel prediction in error resilient video transmission.	ICIP	2004	DBLP DOI BibTeX RDF
42	Shang Xue, Bengt Oelmann	Efficient VLSI Implementation of a VLC Decoder for Universal Variable Length Code.	ISVLSI	2003	DBLP DOI BibTeX RDF
42	Hyeon-Cheol Mo, Jong-Sun Kim, Lee-Sup Kim	A high-speed pattern decoder in MPEG-4 padding block hardware accelerator.	ISCAS (2)	2001	DBLP DOI BibTeX RDF
42	Sangjin Hong, Wayne E. Stark	Design and Implementation of a Low Complexity VLSI Turbo-Code Decoder Architecture for Low Energy Mobile Wireless Communications.	J. VLSI Signal Process.	2000	DBLP DOI BibTeX RDF
42	Daesun Oh, Keshab K. Parhi	Low Complexity Decoder Architecture for Low-Density Parity-Check Codes.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	Quasi-cyclic (QC) LDPC codes, Finite precision, Variable quantization, Sum-product algorithm (SPA), Highly-parallel decoding, Low complexity decoder architecture, Low-density parity check (LDPC) codes
42	Yuri B. Boiko, Gabriel A. Wainer	Modeling of neural decoder based on binary spiking neurons in DEVS.	SpringSim	2009	DBLP BibTeX RDF	binary response function, brain machine, neural spiking decoder, spiking decoding, discrete event simulation, DEVS, spiking neuron
42	Daesun Oh, Keshab K. Parhi	Nonuniformly quantized min-sum decoder architecture for low-density parity-check codes.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	finite word-length, ldpc decoder, min-sum (MS), nonuniform quantization
42	Mohammad M. Mansour, Naresh R. Shanbhag	A Novel Design Methodology for High-Performance Programmable Decoder Cores for AA-LDPC Codes.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	turbo-decoding message-passing algorithm, VLSI decoder architectures, LDPC codes, Ramanujan graphs
42	Sharareh Babvey, Anu G. Bourgeois, José Alberto Fernández-Zepeda, Steven W. McLaughlin	A Parallel Implementation of the Message-Passing Decoder of LDPC Codes Using a Reconfigurable Optical Model.	SNPD	2005	DBLP DOI BibTeX RDF	optical buses, message-passing decoder, Reconfigurable architectures, LDPC codes
42	Timo Vogt, Norbert Wehn, Philippe Alves	A multi-standard channel-decoder for base-station applications.	SBCCI	2004	DBLP DOI BibTeX RDF	CDMA2k, convolutional decoder, hardware sharing, wireless, configurable, MAP, W-CDMA
40	Yi-Chih Chao, Shih-Tse Wei, Bin-Da Liu, Jar-Ferr Yang	Combined CAVLC Decoder, Inverse Quantizer, and Transform Kernel in Compact H.264/AVC Decoder.	IEEE Trans. Circuits Syst. Video Technol.	2009	DBLP DOI BibTeX RDF
39	Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel	High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	Block turbo decoding, Full-parallel architecture, Complexity analysis, FPGA implementation
39	Kai Yang 0001, Jon Feldman, Xiaodong Wang 0001	Nonlinear Programming Approaches to Decoding Low-Density Parity-Check Codes.	IEEE J. Sel. Areas Commun.	2006	DBLP DOI BibTeX RDF
39	Markus Flierl, Bernd Girod	Coding of Multi-View Image Sequences with Video Sensors.	ICIP	2006	DBLP DOI BibTeX RDF
39	Robert Link, Samir Kallel	Markov model aided decoding for image transmission using soft-decision-feedback.	IEEE Trans. Image Process.	2000	DBLP DOI BibTeX RDF
39	Ofer Amrani, Yair Be'ery, Alexander Vardy	Bounded-Distance Decoding of the Leech Lattice and the Golay Code.	Algebraic Coding	1993	DBLP DOI BibTeX RDF
38	Wen Ji, Yiqiang Chen, Chen Lei, Huiguo Zhang, Hui Wang, Yunbing Xing, Bo Tang	Module and Distortion Analysis for Video Decoding on Mobile Devices.	ICN	2008	DBLP DOI BibTeX RDF	complexity, decoder, distortion, AVS
38	Khalid A. Darabkh, W. David Pan	Stationary queue-size distribution for variable complexity sequential decoders with large timeout.	ACM Southeast Regional Conference	2006	DBLP DOI BibTeX RDF	Fano decoder, queue size distribution, timeout
38	Jörg Kliewer, Ragnar Thobaben	Combining FEC and Optimal Soft-Input Source Decoding for the Reliable Transmission of Correlated Variable-Length Encoded Signal.	DCC	2002	DBLP DOI BibTeX RDF	Joint source-channel decoding, soft-input soft-output source decoder, iterative decoding, variable-length codes
37	Shenghui Song 0001, Q. T. Zhang	Optimal decoder for channels with estimation errors.	IEEE Trans. Wirel. Commun.	2009	DBLP DOI BibTeX RDF
37	Osamu Shimada, Toshiyuki Nomura, Akihiko Sugiyama, Masahiro Serizawa	Tradeoff Between Complexity and Memory Size in the 3GPP Enhanced aacPlus Decoder: Speed-Conscious and Memory-Conscious Decoders on a 16-Bit Fixed-Point DSP.	J. Signal Process. Syst.	2009	DBLP DOI BibTeX RDF	Audio codec, 3GPP enhanced aacPlus, DSP implementation, Memory size, Computational complexity, Tradeoff
37	Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott	A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes.	ISCAS	2008	DBLP DOI BibTeX RDF
37	Ritesh Rajore, Ganesh Garga, H. S. Jamadagni, S. K. Nandy 0001	Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture.	ASAP	2008	DBLP DOI BibTeX RDF
37	Massimo Rovini, Alfonso Martinez	On the Addition of an Input Buffer to an Iterative Decoder for LDPC Codes.	VTC Spring	2007	DBLP DOI BibTeX RDF
37	Yu Hu 0016, Qing Li 0001, Siwei Ma, C.-C. Jay Kuo	Decoder-Friendly Adaptive Deblocking Filter (DF-ADF) Mode Decision in H.264/AVC.	ISCAS	2007	DBLP DOI BibTeX RDF
37	Lilian Atieno, Jonathan Allen, Dennis Goeckel, Russell Tessier	An adaptive Reed-Solomon errors-and-erasures decoder.	FPGA	2006	DBLP DOI BibTeX RDF	FPGA, power reduction, Reed-Solomon
37	Yuming Zhu, Yanni Chen, Dale E. Hocevar, Manish Goel	A Reduced-Complexity, Scalable Implementation of Low Density Parity Check (LDPC) Decoder.	SiPS	2006	DBLP DOI BibTeX RDF
37	Imran Ahmed 0001, Tughrul Arslan	A Reconfigurable Viterbi Decoder for a Communication Platform.	FPL	2006	DBLP DOI BibTeX RDF
37	Bontae Koo, Juhyun Lee, Sekho Lee, Jinkyu Kim, Minseok Choi, Hyuk Park 0002, Seongmin Kim, Nak-Woong Eum, Heebum Jung	Design of Audio and Video decoder for the T-DMB Receiver.	ICME	2006	DBLP DOI BibTeX RDF
37	Chang-Jin Choi, Sang-Hun Yoon, Jong-Wha Chong, Shouyin Liu	A New Low-Power and High Speed Viterbi Decoder Architecture.	ICUCT	2006	DBLP DOI BibTeX RDF	RE-exchange, low-power, look-ahead, viterbi
37	Yi-Chih Chao, Shih-Tse Wei, Jar-Ferr Yang, Bin-Da Liu	Combined CAVLC Decoder and Inverse Quantizer for Efficient H.264/AVC Decoding.	APCCAS	2006	DBLP DOI BibTeX RDF
37	Shih-Hao Wang, Wen-Hsiao Peng, Yuwen He, Guan-Yi Lin, Cheng-Yi Lin, Shih-Chien Chang, Chung-Neng Wang, Tihao Chiang	A Software-Hardware Co-Implementation of MPEG-4 Advanced Video Coding (AVC) Decoder with Block Level Pipelining.	J. VLSI Signal Process.	2005	DBLP DOI BibTeX RDF	advanced video coding (AVC), joint video team (JVT), software-hardware co-implementation, MB level pipelining, H.264, MPEG-4, task partition
37	Feng Liu, Chi-Ying Tsui	A Data Discarding Framework for Reducing the Energy Consumption of Viterbi Decoder in Decoding Broadcasted Wireless Multi-Resolution JPEG2000 Images.	ESTIMedia	2005	DBLP DOI BibTeX RDF
37	Hanho Lee	An ultra high-speed Reed-Solomon decoder.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
37	Linjian Mo, Haixiang Zhang, Jiajun Bu, Chun Chen 0001	Speed Optimization of a MPEG-4 Software Decoder Based on ARM Family Cores.	ICIAR	2005	DBLP DOI BibTeX RDF
37	Jian Liang, Russell Tessier, Dennis Goeckel	A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder.	FCCM	2004	DBLP DOI BibTeX RDF
37	Matjaz Verderber, Andrej Zemva, Damjan Lampret	HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder.	DATE	2003	DBLP DOI BibTeX RDF
37	Matjaz Verderber, Andrej Zemva, Andrej Trost	HW/SW Codesign of the MPEG-2 Video Decoder.	IPDPS	2003	DBLP DOI BibTeX RDF
37	Ari Hämäläinen, Jukka Henriksson	Novel Use of Channel Information in a Neural Convolutional Decoder.	IJCNN (5)	2000	DBLP DOI BibTeX RDF
37	Li-Minn Ang, Hon Nin Cheung, Kamran Eshraghian	VLSI decoder architecture for embedded zerotree wavelet algorithm.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
37	Bupesh Pandita, Subir K. Roy	Design and Implementation of Viterbi Decoder Using FPGAs.	VLSI Design	1999	DBLP DOI BibTeX RDF
37	Martin Benes 0002, Steven M. Nowick, Andrew Wolfe	A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors.	ASYNC	1998	DBLP DOI BibTeX RDF	Huffman encoding, embedded systems, asynchronous, embedded processors, dynamic logic, hazards, digital design
36	Chih-Da Chien, Cheng-An Chien, Jui-Chin Chu, Jiun-In Guo, Ching-Hwa Cheng	A 252Kgates/4.9Kbytes SRAM/71mW multistandard video decoder for high definition video applications.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	H.264, MPEG, Video decoder
36	Ke Xu 0014, Chiu-sing Choy	Low-power H.264/AVC baseline decoder for portable applications.	ISLPED	2007	DBLP DOI BibTeX RDF	low-power, decoder, H.264/AVC
36	Basant Kumar Dwivedi, Jan Hoogerbrugge, Paul Stravers, M. Balakrishnan	Exploring design space of parallel realizations: MPEG-2 decoder case study.	CODES	2001	DBLP DOI BibTeX RDF	MPEG-2 decoder, YAPI, parallel realization, process, thread, FIFO
36	Sumio Morioka, Yasunao Katayama	Design Methodology for a One-Shot Reed-Solomon Encoder and Decoder.	ICCD	1999	DBLP DOI BibTeX RDF	one-shot Reed-Solomon encoder decoder, Reed-Muller formula, Error Correction Codes, arithmetic circuit, Galois field
36	Hao Tang, Hung Chang Lin	Multi-Valued Decoder Based on Resonant Tunneling Diodes in Current Tapping Mode.	ISMVL	1996	DBLP DOI BibTeX RDF	multi-valued decoder, current tapping mode, single peaked RTD sections, single literal function, simulation, decoding, circuit analysis computing, multivalued logic circuits, resonant tunnelling diodes, resonant tunneling diodes
33	Emin Martinian, Gregory W. Wornell, Ram Zamir	Source Coding With Distortion Side Information.	IEEE Trans. Inf. Theory	2008	DBLP DOI BibTeX RDF
33	Maja Loncar, Rolf Johannesson, Irina E. Bocharova, Boris D. Kudryashov	Soft-Output BEAST Decoding With Application to Product Codes.	IEEE Trans. Inf. Theory	2008	DBLP DOI BibTeX RDF
33	En-Hui Yang, Da-ke He, Tomohiko Uyematsu, Raymond W. Yeung	Universal Multiterminal Source Coding Algorithms With Asymptotically Zero Feedback: Fixed Database Case.	IEEE Trans. Inf. Theory	2008	DBLP DOI BibTeX RDF
33	David Declercq, Marc P. C. Fossorier	Decoding Algorithms for Nonbinary LDPC Codes Over GF(q).	IEEE Trans. Commun.	2007	DBLP DOI BibTeX RDF
33	Chang-Hong Fu 0002, Yui-Lam Chan, Tak-Piu Ip, Wan-Chi Siu	New Architecture for MPEG Video Streaming System With Backward Playback Support.	IEEE Trans. Image Process.	2007	DBLP DOI BibTeX RDF
33	Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel	Towards Gb/s turbo decoding of product code onto an FPGA device.	ISCAS	2007	DBLP DOI BibTeX RDF
33	Zhen Li 0008, Limin Liu, Edward J. Delp	Wyner-Ziv Video Coding With Universal Prediction.	IEEE Trans. Circuits Syst. Video Technol.	2006	DBLP DOI BibTeX RDF
33	Yuping Zhang, Jun Tang, Keshab K. Parhi	Low Complexity List Updating Circuits for List Sphere Decoders.	SiPS	2006	DBLP DOI BibTeX RDF
33	Pradeepa Yahampath, Mirek Pawlak	On finite-state vector quantization for noisy channels.	IEEE Trans. Commun.	2004	DBLP DOI BibTeX RDF
33	M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De Micheli	Decoding nanowire arrays fabricated with the multi-spacer patterning technique.	DAC	2009	DBLP DOI BibTeX RDF	MSPT, spacer technique, decoder, emerging technologies, crossbar, nanowires
33	Wei Qin, Sharad Malik	Automated synthesis of efficient binary decoders for retargetable software toolkits.	DAC	2003	DBLP DOI BibTeX RDF	binary decoder, decoding tree, decision tree, instruction set simulator
33	Priti Shankar, K. Sasidharan, Vikas Aggarwal, B. Sundar Rajan	A Package for the Implementation of Block Codes as Finite Automata.	CIAA	2000	DBLP DOI BibTeX RDF	minimal trellis, decoder complexity, subtrellis overlaying, block codes
32	John En	Autor's Reply.	IEEE Trans. Computers	1979	DBLP DOI BibTeX RDF	majority logic decoder, Catastrophic error propagation, feedback decoder, infinite error propagation, convolution code
31	Kai Zhang 0025, Xinming Huang 0001, Zhongfeng Wang	High-throughput layered decoder implementation for quasi-cyclic LDPC codes.	IEEE J. Sel. Areas Commun.	2009	DBLP DOI BibTeX RDF
31	Jürgen Slowack, Jozef Skorupa, Stefaan Mys, Peter Lambert, Rik Van de Walle, Christos Grecos	Distributed video coding with decoder-driven skip.	MobiMedia	2009	DBLP DOI BibTeX RDF	distributed video coding, Wyner-Ziv coding
31	Christiane Beuschel, Hans-Jörg Pfleiderer	FPGA implementation of a flexible decoder for long LDPC codes.	FPL	2008	DBLP DOI BibTeX RDF
31	Yang Sun 0001, Joseph R. Cavallaro	A low-power 1-Gbps reconfigurable LDPC decoder design for multiple 4G wireless standards.	SoCC	2008	DBLP DOI BibTeX RDF
31	Yuewei Dai, Jinwei Wang, Guangjie Liu	Optimum Decoder for Barni's Multiplicative Watermarking Based on Minimum Bayesian Risk Criterion.	ICNSC	2008	DBLP DOI BibTeX RDF
31	Rohit Puri, Abhik Majumdar, Kannan Ramchandran	PRISM: A Video Coding Paradigm With Motion Estimation at the Decoder.	IEEE Trans. Image Process.	2007	DBLP DOI BibTeX RDF
31	Gummidipudi Krishnaiah, Nur Engin, Sergei Sawitzki	Scalable reconfigurable channel decoder architecture for future wireless handsets.	DATE	2007	DBLP DOI BibTeX RDF
31	Rahul Nagpal, Y. N. Srikant	Compiler-Assisted Instruction Decoder Energy Optimization for Clustered VLIW Architectures.	HiPC	2007	DBLP DOI BibTeX RDF
31	Eun Sung Jeon, Janghoon Yang, Dong Ku Kim	Complexity Limited Sphere Decoder and its SER Performance Analysis.	FGCN (1)	2007	DBLP DOI BibTeX RDF
31	M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli	Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays.	ICCAD	2007	DBLP DOI BibTeX RDF
31	Matthias May, Christian Neeb, Norbert Wehn	Evaluation of High Throughput Turbo-Decoder Architectures.	ISCAS	2007	DBLP DOI BibTeX RDF
31	Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa	Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code.	IEEE Trans. Commun.	2006	DBLP DOI BibTeX RDF
31	Alexandre Graell i Amat, Sergio Benedetto, Guido Montorsi, Daniele Vogrig, Andrea Neviani, Andrea Gerosa	Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code.	IEEE Trans. Commun.	2006	DBLP DOI BibTeX RDF
31	S. Au, Shahriar Mirabbasi, Lutz H.-J. Lampe, Robert Schober	Per-survivor processing Viterbi decoder for Bluetooth applications.	ISCAS	2006	DBLP DOI BibTeX RDF
31	Kazunori Shimizu, Tatsuyuki Ishikawa, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto	A parallel LSI architecture for LDPC decoder improving message-passing schedule.	ISCAS	2006	DBLP DOI BibTeX RDF
31	Hyung-Su Jeon, Hye-Min Noh, Cheol-Jung Yoo, Ok-Bae Chang	Design of H.264/AVC-Based Software Decoder for Mobile Phone.	ICCSA (3)	2006	DBLP DOI BibTeX RDF
31	Abdul-Rafeeq Abdul-Shakoor, Valek Szwarc	A High Performance Soft Decision Viterbi Decoder for Wlan and Broadband Applications.	CCECE	2006	DBLP DOI BibTeX RDF
31	Haksoo Kim, Manbae Kim	The Design of Single Encoder and Decoder for Multi-view Video.	PSIVT	2006	DBLP DOI BibTeX RDF