Search results for "JEDEC"

Found 14 publication records. Showing 14 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
86	Richard H. Stern	Coming down the home stretch in the Rambus standardization skullduggery saga: To levy or not to levy royalties.	IEEE Micro	2007	DBLP DOI BibTeX RDF	Rambus, antitrust violation, skullduggery, Secret Squirrel, DDR SDRAM, JEDEC, standardization, law, patents, SDRAM
74	Richard H. Stern	Another Update on Standardization Skullduggery.	IEEE Micro	2001	DBLP DOI BibTeX RDF
49	Richard H. Stern	More standardization skullduggery.	IEEE Micro	2001	DBLP DOI BibTeX RDF
35	Tim McDonald, Stephanie Watts Butler	Progress and Current Topics of JEDEC JC-70.1 Power GaN Device Quality and Reliability Standards Activity: Or: What is the Avalanche capability of your GaN Transistor?	IRPS	2021	DBLP DOI BibTeX RDF
35	Carlos Bernal, Manuel Jiménez, Fabio Andrade 0001	Evaluating the JEDEC Standard JEP173, Dynamic RDSON Test Method for GaN HEMTs.	ISCAS	2020	DBLP DOI BibTeX RDF
35	J. W. McPherson	Brief history of JEDEC qualification standards for silicon technology and their applicability(?) to WBG semiconductors.	IRPS	2018	DBLP DOI BibTeX RDF
35	Manuel Kaufmann, Timm Ostermann	Simulation model based on JEDEC JS-001-2014 for circuit simulation of HBM ESD pulses on IC level.	EMC Compo	2015	DBLP DOI BibTeX RDF
35	Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen	DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks.	ITC	2012	DBLP DOI BibTeX RDF
35	Yi-Shao Lai, Ping-Feng Yang, Chang-Lin Yeh	Experimental studies of board-level reliability of chip-scale packages subjected to JEDEC drop test condition.	Microelectron. Reliab.	2006	DBLP DOI BibTeX RDF
35	Chang-Lin Yeh, Yi-Shao Lai	Support excitation scheme for transient analysis of JEDEC board-level drop test.	Microelectron. Reliab.	2006	DBLP DOI BibTeX RDF
35	Peter Alpern, Kheng Chooi Lee, Rainer Tilgner	Effect of long and short Pb-free soldering profiles of IPC/JEDEC J-STD-020 on plastic SMD packages.	Microelectron. Reliab.	2004	DBLP DOI BibTeX RDF
25	Daniel Schmidt 0001, Norbert Wehn	DRAM power management and energy consumption: a critical assessment.	SBCCI	2009	DBLP DOI BibTeX RDF	modelling, measurement, power management, SDRAM
25	John Goodenough 0001	Design Automation Standards: The IP Providers Perspective.	VLSI Design	2008	DBLP DOI BibTeX RDF
25	Brian A. Box, John Nieznanski	Common processor element packaging for CHAMP.	FCCM	1995	DBLP DOI BibTeX RDF