Search results for "Low-voltage"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
62	Omid Mirmotahari, Yngvar Berg	Low Voltage Design against Power Analysis Attacks.	DELTA	2008	DBLP DOI BibTeX RDF	Low Voltage (LV), Floating-Gate (FG) and supply current analysis, Differential Power Analysis (DPA), Ultra Low Voltage (ULV)
61	Luis Henrique de Carvalho Ferreira, Tales Cleber Pimenta, Robson L. Moreno, Wilhelmus A. M. Van Noije	Ultra low-voltage ultra low-power CMOS threshold voltage reference.	SBCCI	2006	DBLP DOI BibTeX RDF	low power, CMOS, low voltage, threshold voltage, voltage reference
59	Wanli Jiang, Eric Peterson	Performance Comparison of VLV, ULV, and ECR Tests.	J. Electron. Test.	2003	DBLP DOI BibTeX RDF	very low voltage test, dynamic current test, test threshold, test effectiveness, test efficiency
58	Jean Michel Daga, E. Ottaviano, Daniel Auvergne	Temperature Effect on Delay for Low Voltage Applications.	DATE	1998	DBLP DOI BibTeX RDF	temperature effect, derating, Low power, delay, Low voltage
58	Erik J. Mentze, Kevin M. Buck, Herbert L. Hess, David Cox, Mohammad M. Mojarradi	A Low Voltage to High Voltage Level Shifter in a Low Voltage, 0.25 µm, PD SOI Process.	ISVLSI	2004	DBLP DOI BibTeX RDF
57	Qadeer Ahmad Khan, Sanjay Kumar Wadhwa, Kulbhushan Misri	A Low Voltage Switched-Capacitor Current Reference Circuit with low dependence on Process, Voltage and Temperature.	VLSI Design	2003	DBLP DOI BibTeX RDF
56	Cosmin Popa	Low-Voltage Low-Power Curvature-Corrected Voltage Reference Circuit Using DTMOSTs.	PATMOS	2007	DBLP DOI BibTeX RDF
55	Liqiong Wei, Kaushik Roy 0001, Vivek De	Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs.	VLSI Design	2000	DBLP DOI BibTeX RDF	low voltage low power, multiple threshold voltages, multiple supply voltages and leakage control
54	J. Veerendra Kumar, K. Radhakrishna Rao	A Low-Voltage Low Power CMOS Companding Filter.	VLSI Design	2003	DBLP DOI BibTeX RDF
52	Carlos Dualibe, Pablo A. Petrashin, Luis E. Toledo, Walter J. Lancioni	New low-voltage electrically tunable triode-MOSFET transconductor and its application to low-frequency Gm-C filtering.	SBCCI	2005	DBLP DOI BibTeX RDF	Gm-C filter, analog CMOS, low-frequency, transconductor, low-power, low-voltage, instrumentation amplifier
51	M. Ali-Bakhshian, K. Sadeghi	A novel continuous-time common-mode feedback for low-voltage switched-OPAMP.	ISLPED	2004	DBLP DOI BibTeX RDF	CMFB, delta-sigma, switched-OPAMP, low-voltage, continuous-time
51	Christian Jesús B. Fayomi, Gilson I. Wirth, Jaime Ramírez-Angulo, Akira Matsuzawa	"The flipped voltage follower"-based low voltage fully differential CMOS sample-and-hold circuit.	ISCAS	2008	DBLP DOI BibTeX RDF
51	Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker 0001	On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing.	Asian Test Symposium	2005	DBLP DOI BibTeX RDF	Temperature testing, Resistive defects, Early-life failures, Low-voltage testing
50	Rajesh Garg, Gagandeep Mallarapu, Sunil P. Khatri	A Single-supply True Voltage Level Shifter.	DATE	2008	DBLP DOI BibTeX RDF
49	Ferdinando Bedeschi, Edoardo Bonizzoni, Andrea Fantini, Claudio Resta, Guido Torelli	A low-power low-voltage MOSFET-only voltage reference.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
48	Kuo-Hsing Cheng, Shun-Wen Cheng, Che-Yu Liao	64-bit Low Threshold Voltage High-Speed Conditional Carry Adder by Complementary Pass-Transistor Logi.	ISVLSI	2004	DBLP DOI BibTeX RDF	CPL, conditional sum adder, low-threshold voltage, differential-end, VLSI design, low-voltage
48	Piet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker 0001	On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
47	Zhiyu Liu, Volkan Kursun	Robust Dynamic Node Low Voltage Swing Domino Logic with Multiple Threshold Voltages.	ISQED	2006	DBLP DOI BibTeX RDF	Low Voltage Swing, Gate Oxide Leakage, Domino Logic, Subthreshold Leakage, Dual Threshold Voltage
47	Ming-Dou Ker, Hung-Tai Liao	Design of Mixed-Voltage Crystal Oscillator Circuit in Low-Voltage CMOS Technology.	ISCAS	2007	DBLP DOI BibTeX RDF
47	Erik J. Mentze, Herbert L. Hess, Kevin M. Buck, T. G. Windley	A Scalable High-Voltage Output Driver for Low-Voltage CMOS Technologies.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
46	Juan José Carrillo, Elkim Roa, José Vieira, Wilhelmus A. M. Van Noije	A low-voltage bandgap reference source based on the current-mode technique.	SBCCI	2009	DBLP DOI BibTeX RDF	CMOS voltage reference, temperature coefficient, analog circuits, low voltage
46	Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott A. Mahlke	Enabling ultra low voltage system operation by tolerating on-chip cache failures.	ISLPED	2009	DBLP DOI BibTeX RDF	fault-tolerant cache, low voltage operation, dynamic voltage scaling
45	Volkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman	High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process.	ISQED	2004	DBLP DOI BibTeX RDF
45	Sherif A. Tawfik, Volkan Kursun	Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew.	ISCAS	2007	DBLP DOI BibTeX RDF
44	J. Veerendra Kumar, K. Radhakrishna Rao	A low-voltage low power square-root domain filter.	APCCAS (2)	2002	DBLP DOI BibTeX RDF
43	Bradley A. Minch	Low-Voltage Wilson Current Mirrors in CMOS.	ISCAS	2007	DBLP DOI BibTeX RDF
43	Kuo-Hsing Cheng, Yung-Hsiang Lin	A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed application.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
43	Andre Vilas Boas, Jefferson B. D. Soldera, Alfredo Olmos	A 1.8V supply multi-frequency digitally trimmable on-chip IC oscillator with low-voltage detection capability.	SBCCI	2004	DBLP DOI BibTeX RDF	bandgap, low-voltage detector, relaxation, oscillator, trimming
43	Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi	CMOS flash analog-to-digital converter for high speed and low voltage applications.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	TIQ comparator, fat tree encoder, flash ADC, analog-to-digital converter, low voltage, high speed
43	Jonathan T.-Y. Chang, Edward J. McCluskey	Quantitative analysis of very-low-voltage testing.	VTS	1996	DBLP DOI BibTeX RDF	very-low-voltage testing, static CMOS chips, supply voltage, rated conditions, early-life failures, test conditions, test speed, VLSI, VLSI, integrated circuit testing, CMOS integrated circuits, failure analysis, quantitative analysis, threshold voltage, integrated circuit noise
41	S. Alireza Zabihian, Reza Lotfi	Ultra-Low-Voltage, Low-Power, High-Speed Operational Amplifiers Using Body-Driven Gain-Boosting Technique.	ISCAS	2007	DBLP DOI BibTeX RDF
40	Hamid Nejati, Tamer Ragheb, Yehia Massoud	On the design of customizable low-voltage common-gate LNA-mixer pair using current and charge reusing techniques.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	common-gate, low-voltage, low noise amplifier, mixer
40	Jingmeng Liu, Tianmiao Wang, Dong Xu 0005, Lipeng Sun	Research on high-voltage inverter controlling system based on wave algorithm.	RAM	2008	DBLP DOI BibTeX RDF
40	Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh	Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages.	IEEE Trans. Very Large Scale Integr. Syst.	2005	DBLP DOI BibTeX RDF
40	Huawei Li, Yu Fan, Tao Wu	Impact of Load Characteristics and Low-Voltage Load Shedding Schedule on Dynamic Voltage Stability.	CCECE	2006	DBLP DOI BibTeX RDF
39	Peter Hazucha, Fabrice Paillet, Sung Tae Moon, David J. Rennie, Gerhard Schrom, Donald S. Gardner, Kenneth Ikeda, Gell Gellman, Tanay Karnik	Low Voltage Buffered Bandgap Reference.	ISQED	2007	DBLP DOI BibTeX RDF
39	Yunfeng Peng, Derui Kong, Feng Zhou	A Low-Voltage Sampling Switch with Improved Linearity.	CCECE	2006	DBLP DOI BibTeX RDF
39	Kiyoo Itoh 0001	Leakage- and variability-conscious circuit designs for the 0.5-v nanoscale CMOS era.	ISLPED	2009	DBLP DOI BibTeX RDF	0.5-v nanoscale cmos lsis, conventional mosfet, minimum vdd, speed variation, vt variation, leakage, sram, dram, finfet
38	Zhiyuan Li, Mingyan Yu, Jianguo Ma	A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier.	APCCAS	2006	DBLP DOI BibTeX RDF
38	Vojkan Vidojkovic, Johan van der Tang, Eric Hanssen, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund	Low voltage, low power folded-switching mixer with current-reuse in 0.18µm CMOS.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
38	Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio J. López-Martín	Techniques for the Design of Low Voltage Power Efficient Analog and Mixed Signal Circuits.	VLSI Design	2009	DBLP DOI BibTeX RDF
38	Chih-Jen Cheng, Shuenn-Yuh Lee	A low-voltage adaptive switched-current SDM for bio-acquisition microsystems.	ISCAS	2006	DBLP DOI BibTeX RDF
38	Paul Ampadu	Ultra-low voltage VLSI: are we there yet?	ISCAS	2006	DBLP DOI BibTeX RDF
37	Kaushik Roy 0001	Ultra low voltage CMOS.	ISLPED	2009	DBLP DOI BibTeX RDF	adaptive supply scaling, nano-scale cmos system, ultra low voltage design, ultra-dynamic voltage scaling
37	Carl James Debono, Franco Maloberti, Joseph Micallef	A low-voltage CMOS multiplier for RF applications (poster session).	ISLPED	2000	DBLP DOI BibTeX RDF	CMOS, low-voltage, RF, analog multiplier
37	A. B. Bhattacharyya, Ram Singh Rana, S. K. Guha, Rajendar Bahl, R. Anand, M. J. Zarabi, P. A. Govindacharyulu, U. Gupta, V. Mohan, Jatin Roy, Amul Atri	A micropower analog hearing aid on low voltage CMOS digital process.	VLSI Design	1996	DBLP DOI BibTeX RDF	differential amplifiers, automatic gain control, micropower analog hearing aid, low voltage CMOS digital process, adaptive biasing, MOS translinear loop circuit, degenerating linearising resistor, input differential stage, AGC block, conversion efficiency, 3 micron, 1.0 V, power consumption, CMOS analogue integrated circuits, hearing aids
37	Seiede Fateme Ashrafi, Seyed Mojtaba Atarodi, Mohammad Chahardori	New low voltage, high PSRR, CMOS bandgap voltage reference.	SoCC	2008	DBLP DOI BibTeX RDF
36	Yngvar Berg, Omid Mirmotahari	Ultra low-voltage switched current mirror.	DDECS	2009	DBLP DOI BibTeX RDF
36	Wei-Hua Chen, Quanyuan Jiang, Yijia Cao	Low Voltage Risk Assessment in Power System Using Neural Network Ensemble.	ISNN (2)	2006	DBLP DOI BibTeX RDF
36	Chi-Hung Lin, Mohammed Ismail 0001	Design and analysis of an ultra low-voltage CMOS class-AB V-I converter for dynamic range enhancement.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
36	Bram Kruseman, Stefan van den Oetelaar, Josep Rius 0001	Comparison of IDDQ Testing and Very-Low Voltage Testing.	ITC	2002	DBLP DOI BibTeX RDF
36	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm	Variations-aware low-power design with voltage scaling.	DAC	2005	DBLP DOI BibTeX RDF	process variations, parallel systems, low-voltage
36	Yukiya Miura, Hiroshi Yamazaki	A Low-Loss Built-In Current Sensor.	J. Electron. Test.	1999	DBLP DOI BibTeX RDF	low-voltage LSIs, multiple power supplies, IDDQ testing, Built-in current sensor
36	Yuyun Liao, D. M. H. Walker	Optimal voltage testing for physically-based faults.	VTS	1996	DBLP DOI BibTeX RDF	optimal voltage testing, physically-based faults, resistive bridges, gate outputs, pattern sensitive functional faults, transmission gates, fault diagnosis, logic testing, delays, integrated circuit testing, automatic testing, fault coverage, CMOS logic circuits, delay faults, Iddq tests, CMOS circuits, logic gates, test vector, noise margin, selection strategy, low-voltage testing, integrated circuit noise
36	Zushu Yan, Liangguo Shen, Yuanfii Zhao, Suge Yue	A low-voltage CMOS low-dropout regulator with novel capacitor-multiplier frequency compensation.	ISCAS	2008	DBLP DOI BibTeX RDF
35	Kyeong-Sik Min, Young-Hee Kim, Jin-Hong Ahn, Jin-Yong Chung, Takayasu Sakurai	CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits.	ISCAS (5)	2002	DBLP DOI BibTeX RDF
35	Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale	Low-voltage LDO Compensation Strategy based on Current Amplifiers.	ISCAS	2008	DBLP DOI BibTeX RDF
35	Kiyoo Itoh 0001, Masashi Horiguchi, Takayuki Kawahara	Ultra-low voltage nano-scale embedded RAMs.	ISCAS	2006	DBLP DOI BibTeX RDF
35	Daniel J. Deleganes, Micah Barany, George L. Geannopoulos, Kurt Kreitzer, Anant P. Singh, Sapumal B. Wijeratne	Low voltage swing logic circuits for a Pentium 4 processor integer core.	DAC	2004	DBLP DOI BibTeX RDF	LVS, Pentium® 4 processor, integer core, low voltage swing, sense-amp, microprocessor, rotator, adder
34	Saowanee Saewong, Ragunathan Rajkumar	Practical Voltage-Scaling for Fixed-Priority RT-Systems.	IEEE Real Time Technology and Applications Symposium	2003	DBLP DOI BibTeX RDF
34	Christian Falconi, Arnaldo D'Amico, Giuseppe Scotti, Alessandro Trifiletti	Low Voltage CMOS Current and Voltage References without Resistors.	ISCAS	2007	DBLP DOI BibTeX RDF
34	Rajarshi Paul, Amit Patra, Shailendra Baranwal, Kaushik Dash	Design of Second-Order Sub-Bandgap Mixed-Mode Voltage Reference Circuit for Low Voltage Applications.	VLSI Design	2005	DBLP DOI BibTeX RDF
34	Walter Aloisi, Stello Matteo Billé, Gaetano Palumbo	Low-voltage linear voltage regulator suitable for memories.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
34	Ming-Dou Ker, Wei-Jen Chang, Wen-Yu Lo	Low-Voltage-Triggered PNP Devices for ESD Protection Design in Mixed-Voltage I/O Interface with Over-VDD and Under-VSS Signal Levels.	ISQED	2004	DBLP DOI BibTeX RDF
34	Gin Kooi Lim, Tee Hui Teo	A Low-Power Low-Voltage Amplifier for Heart Rate Sensor.	APCCAS	2006	DBLP DOI BibTeX RDF
34	Jiangmin Gu, Chip-Hong Chang	Ultra low voltage, low power 4-2 compressor for high speed multiplications.	ISCAS (5)	2003	DBLP DOI BibTeX RDF
34	Hassan Aboushady, Marie-Minerve Louërat	Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulators.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
34	L. Richard Carley, Akshay Aggarwal, Ram K. Krishnamurthy	Decreasing low-voltage manufacturing-induced delay variations with adaptive mixed-voltage-swing circuits.	ISLPED	1998	DBLP DOI BibTeX RDF	low power CMOS logic, low voltage logic circuits, manufacturing variations, mixed-swing CMOS logic
33	Sanjay Kumar Wadhwa	A low voltage CMOS bandgap reference circuit.	ISCAS	2008	DBLP DOI BibTeX RDF
33	Kornika Moolpho, Jitkasame Ngarmnil	Low Voltage High-Performance Class-AB FGMOS Buffer.	APCCAS	2006	DBLP DOI BibTeX RDF
33	Jesper Steensgaard	Bootstrapped low-voltage analog switches.	ISCAS (2)	1999	DBLP DOI BibTeX RDF
33	Omid Mirmotahari, Yngvar Berg	Ultra Low Voltage High Speed Differential CMOS Inverter.	PATMOS	2008	DBLP DOI BibTeX RDF	Floating-Gate (FG), High-Speed, Ultra Low Voltage (ULV)
33	Vivienne Sze, Anantha P. Chandrakasan	A 0.4-V UWB baseband processor.	ISLPED	2007	DBLP DOI BibTeX RDF	baseband processor, parallelism, ultra-wideband, ultra-low voltage
33	Meng Tong Tan, Joseph Sylvester Chang, Yit Chow Tong	A novel low-voltage low-power wave digital filter bank for an intelligent noise reduction digital hearing instrument.	ISCAS (2)	2001	DBLP DOI BibTeX RDF
33	Eric Y. Chou, A. J. Budrys, Kit M. Cham	Low power salient integration mode image sensor with a low voltage mixed-signal readout architecture.	ISLPED	1998	DBLP DOI BibTeX RDF
32	Antonio J. López-Martín, Jaime Ramírez-Angulo, Ramón González Carvajal	Low-voltage low-power wideband CMOS current conveyors based on the flipped voltage follower.	ISCAS (1)	2003	DBLP DOI BibTeX RDF
32	Kiyoo Itoh 0001, Kenichi Osada, Takayuki Kawahara	Low-Voltage Embedded RAMs - Current Status and Future Trends.	PATMOS	2004	DBLP DOI BibTeX RDF
32	Tolga Kaya, Hür Köser, Eugenio Culurciello	A Silicon-on-Sapphire Low-Voltage Temperature Sensor for Energy Scavengers.	ISCAS	2007	DBLP DOI BibTeX RDF
32	Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio J. López-Martín	Techniques for very low-voltage operation of continuous-time analog CMOS circuits.	VLSI Design	2004	DBLP DOI BibTeX RDF
32	Wanli Jiang, Eric Peterson	Performance Comparison of VLV, ULV, and ECR Tests.	VTS	2002	DBLP DOI BibTeX RDF
32	Sherif A. Tawfik, Volkan Kursun	Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew.	ISQED	2007	DBLP DOI BibTeX RDF
32	Biranchinath Sahu, Gabriel A. Rincón-Mora	A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications.	VLSI Design	2005	DBLP DOI BibTeX RDF	Buck-boost converter IC, integrated power management, dual-mode converter
32	Abdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh	Level-Shifter Free Design of Low Power Dual Supply Voltage CMOS Circuits Using Dual Threshold Voltages.	VLSI Design	2005	DBLP DOI BibTeX RDF
32	Jaime Ramírez-Angulo, Shanta Thoutam, Antonio J. López-Martín, Ramón González Carvajal	Low-voltage CMOS analog four quadrant multiplier based on flipped voltage followers.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
31	Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi 0001, Masahiko Yoshimoto	0.5-V operation variation-aware word-enhancing cache architecture using 7T/14T hybrid SRAM.	ISLPED	2010	DBLP DOI BibTeX RDF	fine-grain control, low power, cache memory, microarchitecture, variation, low voltage
31	Chun-Yueh Yang, Chung-Chih Hung	A low-voltage low-distortion MOS sampling switch.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
31	Liqiong Wei, Zhanping Chen, Kaushik Roy 0001, Mark C. Johnson, Yibin Ye, Vivek De	Design and optimization of dual-threshold circuits for low-voltage low-power applications.	IEEE Trans. Very Large Scale Integr. Syst.	1999	DBLP DOI BibTeX RDF
31	Christer Svensson, Atila Alvandpour	Low power and low voltage CMOS digital circuit techniques.	ISLPED	1998	DBLP DOI BibTeX RDF	low power, CMOS, digital circuits, low voltage
31	Dusan Suvakovic, C. André T. Salama	Guidelines for Use of Registers and Multiplexers in Low Power Low Voltage DSP Systems.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	low power, DSP, energy consumption, switching, multiplexer, low voltage, register, datapath
31	Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar	A CMOS Low Voltage Charge Pump.	VLSI Design	2007	DBLP DOI BibTeX RDF
31	Christian Jesús B. Fayomi, Gordon W. Roberts, Mohamad Sawan	Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: design and chip characterization.	ISCAS (3)	2005	DBLP DOI BibTeX RDF
31	Seoung-Jae Yoo, Arun Ravindran, Mohammed Ismail 0001	A low voltage CMOS transresistance-based variable gain amplifier.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
31	Dinesh Somasekhar, Kaushik Roy 0001	LVDCSL: a high fan-in, high-performance, low-voltage differential current switch logic family.	IEEE Trans. Very Large Scale Integr. Syst.	1998	DBLP DOI BibTeX RDF
30	Dongmin Park, SeongHwan Cho	A power-optimized CMOS LC VCO with wide tuning range in 0.5-V supply.	ISCAS	2006	DBLP DOI BibTeX RDF
30	Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi, Peter Harrod	Dynamic Voltage Scaling Aware Delay Fault Testing.	ETS	2006	DBLP DOI BibTeX RDF
29	Masaaki Iijima, Masayuki Kitamura, Masahiro Numa, Akira Tada, Takashi Ipposhi	Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM.	VLSI Design	2007	DBLP DOI BibTeX RDF
29	Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins	A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
29	Andre Vilas Boas, Alfredo Olmos	A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capability.	ISCAS (1)	2004	DBLP DOI BibTeX RDF
29	Sher Singh Rajput, Sudhanshu Shekhar Jamuar	Ultra low voltage current mirror op amp and its applications.	APCCAS (1)	2002	DBLP DOI BibTeX RDF
29	Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu 0024, Shih-Lien Lu	Improving cache lifetime reliability at ultra-low voltages.	MICRO	2009	DBLP DOI BibTeX RDF