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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 39 occurrences of 32 keywords
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Results
Found 45 publication records. Showing 45 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
173 | Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller 0003 |
The Formal Execution Semantics of SpecC. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
SpecC, simulation, formal specifications, ASMs |
104 | Robert D. Walstrom, Joseph Schneider, Diane T. Rover |
Teaching System-Level Design Using SpecC and SystemC. |
MSE |
2005 |
DBLP DOI BibTeX RDF |
|
104 | Shinya Honda, Hiroaki Takada |
Evaluation of Applying SpecC to the Integrated Design Method of Device Driver and Device. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
86 | Edmund M. Clarke, Himanshu Jain, Daniel Kroening |
Verification of SpecC using predicate abstraction. |
Formal Methods Syst. Des. |
2007 |
DBLP DOI BibTeX RDF |
Verification, System level design, Predicate abstraction |
86 | Himanshu Jain, Daniel Kroening, Edmund M. Clarke |
Verification of SpecC using predicate abstraction. |
MEMOCODE |
2004 |
DBLP DOI BibTeX RDF |
|
86 | Jianwen Zhu, Daniel Gajski |
Compiling SpecC for simulation. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
67 | Lukai Cai, Daniel Gajski, Mike Olivarez |
Introduction of system level architecture exploration using the SpecC methodology. |
ISCAS (5) |
2001 |
DBLP DOI BibTeX RDF |
|
48 | Thanyapat Sakunkonchak, Masahiro Fujita |
Verification of Event-Based Synchronization of SpecC Description Using Difference Decision Diagrams. |
FORTE |
2002 |
DBLP DOI BibTeX RDF |
|
38 | In-Sik Choi, Ill-Keun Rhee, Young-Hoon Lee |
Signal Parameter Extraction via Component Cancellation Using Evolutionary Programming. |
FGCN (2) |
2007 |
DBLP DOI BibTeX RDF |
|
38 | Yu Endo, Jun Sawamoto, Hisao Koizumi |
A Hardware/Software Co-design Method and Its Evaluation to ITS Image Processing and Driver-Support Systems. |
EUC |
2004 |
DBLP DOI BibTeX RDF |
|
38 | Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta 0001, Frederic Doucet |
Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. |
ACSD |
2003 |
DBLP DOI BibTeX RDF |
|
31 | Annette Bunker, Ganesh Gopalakrishnan, Sally A. McKee |
Formal hardware specification languages for protocol compliance verification. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
Heterogeneous Hardware Logic, Hierarchical Annotated Action Diagrams, Lava, Objective VHDL, OpenVera, SpecC, Specification and Description Language, The Unified Modeling Language, Java, Statecharts, SystemC, Message Sequence Charts, Esterel, Live Sequence Charts, timing diagrams, hardware monitors, SystemVerilog, e, Property Specification Language |
31 | Haobo Yu, Andreas Gerstlauer, Daniel Gajski |
RTOS scheduling in transaction level models. |
CODES+ISSS |
2003 |
DBLP DOI BibTeX RDF |
SpecC, model, system design, RTOS |
29 | Che-Wei Chang, Rainer Dömer |
Formal Deadlock Analysis of SpecC Models Using Satisfiability Modulo Theories. |
IESS |
2013 |
DBLP DOI BibTeX RDF |
|
29 | In-Sik Choi |
SPECC - A New Technique for Direction of Arrival Estimation. |
ACN |
2011 |
DBLP DOI BibTeX RDF |
|
29 | Toshihiro Hanawa, Hitoshi Koizumi, Takayuki Banzai, Mitsuhisa Sato, Shin'ichi Miura, Tadatoshi Ishii, Hidehisa Takamizawa |
Customizing Virtual Machine with Fault Injector by Integrating with SpecC Device Model for a Software Testing Environment D-Cloud. |
PRDC |
2010 |
DBLP DOI BibTeX RDF |
|
29 | Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski |
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. |
EURASIP J. Embed. Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Subash Shankar, Masahiro Fujita |
Rule-Based Approaches for Equivalence Checking of SpecC Programs. |
MEMOCODE |
2008 |
DBLP DOI BibTeX RDF |
|
29 | Yu Liu, Satoshi Komatsu, Masahiro Fujita |
The AMS Extension to System Level Design Language - SpecC. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2006 |
DBLP DOI BibTeX RDF |
|
29 | Tetsuro Katayama |
Extraction of Transformation Rules from UML Diagrams to SpecC. |
IEICE Trans. Inf. Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita |
Verification of Synchronization in SpecC Description with the Use of Difference Decision Diagrams. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2003 |
DBLP BibTeX RDF |
|
29 | Shinya Honda, Hiroaki Takada |
Evaluation of Applying SpecC to the Integrated Design Method of Device Driver and Device. |
Embedded Software for SoC |
2003 |
DBLP DOI BibTeX RDF |
|
29 | Lukai Cai, Daniel Gajski, Paul Kritzinger, Mike Olivarez |
Top-Down System Level Design Methodology Using SpecC, VCC and SystemC. |
DATE |
2002 |
DBLP DOI BibTeX RDF |
|
29 | Andreas Gerstlauer, Rainer Dömer, Junyu Peng, Daniel D. Gajski |
System Design - A Practical Guide with SpecC. |
|
2001 |
DOI RDF |
|
29 | Michael L. Olivarez |
Impact of SpecC and SystemC in the SoC Design Methodology. |
ISAS-SCI (1) |
2001 |
DBLP BibTeX RDF |
|
29 | Masahiro Fujita, Hiroshi Nakamura |
The standard SpecC language. |
ISSS |
2001 |
DBLP DOI BibTeX RDF |
|
29 | Jorge L. Díaz-Herrera, Hanmei Chen, Rukshana Alam |
An Isomorphic Mapping for SpecC In UML. |
OMER |
2001 |
DBLP BibTeX RDF |
|
29 | Rainer Dömer, Daniel Gajski |
Reuse and protection of intellectual property in the SpecC system. |
ASP-DAC |
2000 |
DBLP DOI BibTeX RDF |
|
29 | Achim Rettberg, Franz J. Rammig, Andreas Gerstlauer, Daniel Gajski, Wolfram Hardt, Bernd Kleinjohann |
The Specification Language SpecC within the PARADISE Design Environment. |
DIPES |
2000 |
DBLP BibTeX RDF |
|
29 | Rainer Dömer |
System-level modeling and design with the SpecC language. |
|
2000 |
RDF |
|
19 | Zhongbo Cao, Ramon Mercado, Diane T. Rover |
System-level memory modeling for bus-based memory architecture exploration. |
EIT |
2009 |
DBLP DOI BibTeX RDF |
|
19 | Masahiro Fujita, Yoshihisa Kojima, Amir Masoud Gharehbaghi |
Debugging from high level down to gate level. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
post-silicon debug, dependence analysis, system level design, equivalence checking, high-level design |
19 | Ge Hu, Shengbing Ren, Xie Wang |
A Comparison of C/C++-based Software/Hardware Co-design Description Languages. |
ICYCS |
2008 |
DBLP DOI BibTeX RDF |
|
19 | Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Daniel Gajski, Atsushi Nakamura, Dai Araki, Yuuji Nishihara |
Specify-explore-refine (SER): from specification to implementation. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
electronic system-level (ESL) design |
19 | Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Bergamaschi |
Heterogeneous Behavioral Hierarchy Extensions for SystemC. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Takashi Kinoshima, Kazutaka Kobayashi, Nurul Azma Zakaria, Masahiro Kimura, Noriko Matsumoto, Norihiko Yoshida |
Communication Model Exploration for Distributed Embedded Systems and System Level Interpretations. |
EUC Workshops |
2007 |
DBLP DOI BibTeX RDF |
Event-Triggered Communication, Time-Triggered Communication, Stepwise Refinement Design, Model-Driven Architecture, Distributed Embedded Systems |
19 | Masahiro Fujita, Subash Shankar, Sasaki Shunsuke |
Equivalence checking: a rule-based approach. |
MEMOCODE |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Ines Viskic, Rainer Dömer |
A Flexible, Syntax Independent Representation (SIR) for System Level Design Models. |
DSD |
2006 |
DBLP DOI BibTeX RDF |
syntax and semantics, simulation, modeling, evaluation, data structure, system level design, model representation |
19 | Ryosuke Yamasaki, Kazutaka Kobayashi, Nurul Azma Zakaria, Shuji Narazaki, Norihiko Yoshida |
Refactoring-Based Stepwise Refinement in Abstract System-Level Design. |
EUC |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita |
Synchronization verification in system-level design with ILP solvers. |
MEMOCODE |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, Chris J. Myers |
High Level Synthesis of Timed Asynchronous Circuits. |
ASYNC |
2005 |
DBLP DOI BibTeX RDF |
|
19 | Yu Liu, Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro Fujita |
System level design language extensions for timed/untimed digital-analog combined system design. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
AMS extension, timed/untimed, synchronization, system level design, mixed-signal |
19 | Salim Ouadjaout, Dominique Houzet |
Easy SoC Design with VCI SystemC Adapters. |
DSD |
2004 |
DBLP DOI BibTeX RDF |
|
19 | Daniel Gajski, Andreas Gerstlauer |
System-Level Abstraction Semantics. |
ISSS |
2002 |
DBLP DOI BibTeX RDF |
design semantics, modeling, methodology, system-level design, abstraction levels |
19 | Franz-Josef Rammig |
Synthesis Aspects of the PARADISE Design Environment. |
WORDS |
2002 |
DBLP DOI BibTeX RDF |
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