Search results for "Two-voltage"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
38	Ankur Gupta, Rajat Chauhan, Vinod Menezes, Vikas Narang, H. M. Roopashree	A Robust Level-Shifter Design for Adaptive Voltage Scaling.	VLSI Design	2008	DBLP DOI BibTeX RDF
34	Royce L. S. Ching, Evangeline F. Y. Young, Kevin C. K. Leung, Chris C. N. Chu	Post-placement voltage island generation.	ICCAD	2006	DBLP DOI BibTeX RDF	tree, floorplanning, voltage island
26	Diganta Roychowdhury, Israel Koren, C. Mani Krishna 0001, Yann-Hang Lee	A Voltage Scheduling Heuristic for Real-Time Task Graphs.	DSN	2003	DBLP DOI BibTeX RDF
20	Chunhong Chen, Majid Sarrafzadeh	An Effective Algorithm for Gate-Level Power-Delay Tradeoff Using Two Voltages.	ICCD	1999	DBLP DOI BibTeX RDF	Two-voltage, Algorithm, Low power, Gate-level
17	Krishna K. Rangan, Gu-Yeon Wei, David M. Brooks	Thread motion: fine-grained power management for multi-core systems.	ISCA	2009	DBLP DOI BibTeX RDF	multi-core power management, thread motion, dvfs
17	Gerhard Nebel, Thomas Baglin, Iker San Sebastian, Holger Sedlak, Uwe Weder	A very low drop voltage regulator using an NMOS output transistor.	ISCAS (4)	2005	DBLP DOI BibTeX RDF
16	Mohammad Bagheri Hashkavayi, S. Masoud Barakati, S. Hamed Torabi, Vahid Barahouei	An improved method to sub-module voltage balancing in modular multilevel converters with two voltage sensors.	Int. J. Circuit Theory Appl.	2023	DBLP DOI BibTeX RDF
16	Firat Yücel, Erkan Yüce	A New Voltage-Mode Multifunctional Filter Using Only Two Voltage Followers and a Minimum Number of Passive Elements.	J. Circuits Syst. Comput.	2015	DBLP DOI BibTeX RDF
14	Davide Baderna, Alessandro Cabrini, Guido Torelli, Marco Pasotti	Efficiency comparison between doubler and Dickson charge pumps.	ISCAS (2)	2005	DBLP DOI BibTeX RDF
13	Majid Sarrafzadeh, Salil Raje	Scheduling with multiple voltages under resource constraints.	ISCAS (1)	1999	DBLP DOI BibTeX RDF
13	Joseph T.-s. Tsai, Herming Chiueh	High linear voltage references for on-chip CMOS smart temperature sensor from -60degreeC to 140degreeC.	ISCAS	2008	DBLP DOI BibTeX RDF
10	Deni Cetkovic, Vitomir Komen	Optimal Distributed Generation and Capacitor Bank Allocation and Sizing at Two Voltage Levels.	IEEE Syst. J.	2023	DBLP DOI BibTeX RDF
10	Jianqiao Zou, Wei Xu 0006, Jianguo Zhu 0001, Yi Liu 0030	Simplified Model Predictive Thrust Control Based Arbitrary Two Voltage Vectors for Linear Induction Machines in Metro Transportation.	IEEE Trans. Veh. Technol.	2020	DBLP DOI BibTeX RDF
10	Zhaomin Shi, Jiangtao Zhang, Xianlin Pan, Ying Song, Jun Lin 0003, Qing He	Self-Calibration and Verification of Phase Angle Errors of Two Voltage Dividers at High Frequencies.	IEEE Trans. Instrum. Meas.	2019	DBLP DOI BibTeX RDF
10	Ahmet Özkan Özer	Modeling and Controlling an Active Constrained Layer (ACL) Beam Actuated by Two Voltage Sources With/Without Magnetic Effects.	IEEE Trans. Autom. Control.	2017	DBLP DOI BibTeX RDF
9	Nicola Viarani, Nicola Massari, Massimo Gottardi	A new switched capacitor circuit for parallel-pixel image processing [vision sensor integrated signal processing].	ISCAS (6)	2005	DBLP DOI BibTeX RDF
9	Mario Ponce, Arturo J. Martínez, Javier Correa, Jaime Arau	Evaluation of an improved input current shaper used as power factor corrector in electronic ballast.	ISCAS (4)	2002	DBLP DOI BibTeX RDF
6	Jiun-Wei Horng, Hung-Pin Chou, Iun-Cheng Shiu	Current-mode and voltage-mode quadrature oscillator employing multiple outputs CCIIs and grounded capacitors.	ISCAS	2006	DBLP DOI BibTeX RDF
6	Eric A. M. Klumperink, Federico Bruccoleri, Bram Nauta	Finding all elementary circuits exploiting transconductance.	ISCAS (1)	2001	DBLP DOI BibTeX RDF
5	Ji-Man Park, Sung-Ik Jun	A resistance deviation-to-time interval converter for resistive sensors.	SoCC	2008	DBLP DOI BibTeX RDF
5	Wei Tang 0002, Andreas G. Andreou, Eugenio Culurciello	A low-power silicon-on-sapphire tunable ultra-wideband transmitter.	ISCAS	2008	DBLP DOI BibTeX RDF
5	Saraju P. Mohanty, N. Ranganathan	A Framework for Energy and Transient Power Reduction during Behavioral Synthesis.	VLSI Design	2003	DBLP DOI BibTeX RDF
5	Erik A. McShane, Krishna Shenai, Leon Alkalai, E. Kolawa, Victor Boyadzhyan, Brent R. Blaes, Wai-Chi Fang	Novel Design for Testability of a Mixed-Signal VLSI IC.	Great Lakes Symposium on VLSI	1999	DBLP DOI BibTeX RDF	Mixed-signal VLSI, verification, microprocessor, testability, RF