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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2 occurrences of 2 keywords
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Results
Found 6 publication records. Showing 6 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
72 | Aviral Shrivastava, Sanghyun Park, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek |
Automatic Design Space Exploration of Register Bypasses in Embedded Processors. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
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63 | Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Eugene Earlie |
PBExplore: A Framework for Compiler-in-the-Loop Exploration of Partial Bypassing in Embedded Processors. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
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59 | Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie |
Register File Power Reduction Using Bypass Sensitive Compiler. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
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44 | Sanghyun Park, Eugene Earlie, Aviral Shrivastava, Alex Nicolau, Nikil D. Dutt, Yunheung Paek |
Automatic generation of operation tables for fast exploration of bypasses in embedded processors. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
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31 | Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie |
Bypass aware instruction scheduling for register file power reduction. |
LCTES |
2006 |
DBLP DOI BibTeX RDF |
architecture-sensitive compiler, bypass-sensitive, forwarding paths, operation table, processor bypasses, reservation table, power consumption, register file |
24 | Wei-Ming Lin, Hsiu-Jy Ho |
A Bypass-Sensitive Blocking-Preventing Scheduling Technique for Mesh-Connected Multicomputers. |
ISHPC |
2003 |
DBLP DOI BibTeX RDF |
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