|
|
Venues (Conferences, Journals, ...)
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2 occurrences of 2 keywords
|
|
|
Results
Found 6 publication records. Showing 6 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
112 | Johannes Grad, James E. Stine |
Low power binary addition using carry increment adders. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
38 | Hong Diep Nguyen, Bogdan Pasca 0001, Thomas B. Preußer |
FPGA-Specific Arithmetic Optimizations of Short-Latency Adders. |
FPL |
2011 |
DBLP DOI BibTeX RDF |
carry-chain, carry-select, carry-increment, FPGA, addition |
35 | K. Gavaskar, D. Malathi, G. Ravivarma, P. S. Priyatharshan, S. Rajeshwari, B. Sanjay |
Design of Low Power Multiplier with Less Area Using Quaternary Carry Increment Adder for New-Fangled Processors. |
Wirel. Pers. Commun. |
2023 |
DBLP DOI BibTeX RDF |
|
35 | Kyle Price, James E. Stine |
Using Carry Increment Adders to Enhance Energy Savings with Spanning-Tree Adder Structures. |
MWSCAS |
2019 |
DBLP DOI BibTeX RDF |
|
35 | Aribam Balarampyari Devi, Manoj Kumar, Romesh Laishram |
Design and Implementation of an Improved Carry Increment Adder. |
CoRR |
2016 |
DBLP BibTeX RDF |
|
19 | Costas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos |
Fast Parallel-Prefix Modulo 2^n+1 Adders. |
IEEE Trans. Computers |
2004 |
DBLP DOI BibTeX RDF |
|
Displaying result #1 - #6 of 6 (100 per page; Change: )
|
|