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Found 2 publication records. Showing 2 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
40 | Marco Platzner, Bernhard Rinner, Reinhold Weiss |
A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs. |
PDP |
1995 |
DBLP DOI BibTeX RDF |
distributed computer architecture, multi-DSP, application-specific computer architecture, constraint-check-function, performance, FPGAs, parallel architectures, computer architecture, digital simulation, hardware design, special purpose computers, design strategies, qualitative simulation |
22 | Jun-Cheol Lee, Tae-Oh Kim, Joo-Hyung Chae |
Module Implementation and Simulation of Timing Constraint Check Function of I2C Protocol Using Verilog. |
ICEIC |
2023 |
DBLP DOI BibTeX RDF |
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