Search results for "defect-tolerance"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
105	Zachary D. Patitz, Nohpill Park	Modeling and Evaluation of Threshold Defect Tolerance.	DFT	2008	DBLP DOI BibTeX RDF
83	Mehdi Baradaran Tahoori	Low-overhead defect tolerance in crossbar nanoarchitectures.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	reconfigurable architectures, nanotechnology, Defect tolerance
82	Jing Huang 0001, Mehdi Baradaran Tahoori, Fabrizio Lombardi	On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars.	DFT	2004	DBLP DOI BibTeX RDF
79	Zhanglei Wang, Krishnendu Chakrabarty	Built-in Self-test and Defect Tolerance in Molecular Electronics-based Nanofabrics.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	nanofabric, CAEN, chemically assembled, reconfiguration, BIST, nanotechnology, defect tolerance, molecular electronics
79	Prasanna Sundararajan, Steve Guccione	Run-Time defect tolerance using JBits.	FPGA	2001	DBLP DOI BibTeX RDF	Java, FPGA, cores, defect tolerance, run-time reconfiguration
75	Maryam Ashouei, Adit D. Singh, Abhijit Chatterjee	Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS.	VLSI Design	2008	DBLP DOI BibTeX RDF
72	S. K. Tewksbury	Challenges Facing Practical DFT for MEMS.	DFT	2001	DBLP DOI BibTeX RDF	Microelectromechanical systems, microsystems technologies, fault tolerance, defect tolerance
71	Reza M. Rad, Mohammad Tehranipoor	A Reconfiguration-based Defect Tolerance Method for Nanoscale Devices.	DFT	2006	DBLP DOI BibTeX RDF	Nanoscale Devices, Fault Tolerance, Test, Reconfiguration, Redundancy, Crossbar
63	Vijay K. Jain, Glenn H. Chapman	Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC.	DFT	2006	DBLP DOI BibTeX RDF	3D Heterogeneous sensor, redundancy and reconfiguration, energy economization, heterogeneous SOC, J-platform, defect tolerance
60	Tao Xu 0002, Krishnendu Chakrabarty	Integrated droplet routing and defect tolerance in the synthesis of digital microfluidic biochips.	ACM J. Emerg. Technol. Comput. Syst.	2008	DBLP DOI BibTeX RDF	Physical design automation, microfluidics, biochips, module placement
60	Xiaobo Sharon Hu, Alexander Khitun, Konstantin K. Likharev, Michael T. Niemier, Mingqiang Bao, Kang L. Wang	Design and defect tolerance beyond CMOS.	CODES+ISSS	2008	DBLP DOI BibTeX RDF	cmol, nanotechnology, defect tolerance, qca, spin wave
60	Arvind Kumar, Sandip Tiwari	Defect tolerance for nanocomputer architecture.	SLIP	2004	DBLP DOI BibTeX RDF	wire length estimation, FPGA, reliability, reconfigurability, defect tolerance, nanoelectronics, Rent's rule, nanocomputing
59	Zhan Chen, Israel Koren	Techniques for Yield Enhancement of VLSI Adders.	ASAP	1995	DBLP DOI BibTeX RDF	VLSI yield, VLSI adder, defect tolerance, VLSI layout
58	Aiman H. El-Maleh, Bashir M. Al-Hashimi, Aissa Melouki	Transistor-level based defect tolerance for reliable nanoelectronics.	AICCSA	2008	DBLP DOI BibTeX RDF
56	Fei Su, Krishnendu Chakrabarty	Defect Tolerance Based on Graceful Degradation and Dynamic Reconfiguration for Digital Microfluidics-Based Biochips.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
56	Fei Su, Krishnendu Chakrabarty	Defect Tolerance for Gracefully-Degradable Microfluidics-Based Biochips.	VTS	2005	DBLP DOI BibTeX RDF
55	Claude Thibeault, Yvon Savaria, Jean-Louis Houle	Test quality of hierarchical defect-tolerant integrated circuits.	J. Electron. Test.	1992	DBLP DOI BibTeX RDF	defect level, fault coverage, defect tolerance, defect modeling, Combinatorial analysis
54	Jing Huang 0001, Mariam Momenzadeh, Fabrizio Lombardi	Defect tolerance of QCA tiles.	DATE	2006	DBLP DOI BibTeX RDF	emerging technologies, defect tolerance, QCA
53	Reza M. Rad, Mohammad Tehranipoor	SCT: A novel approach for testing and configuring nanoscale devices.	ACM J. Emerg. Technol. Comput. Syst.	2008	DBLP DOI BibTeX RDF	Configuration and testing, reconfigurable nanoscale devices, fault tolerance, crossbar, nanowire
52	Hongbin Sun 0001, Nanning Zheng 0001, Tong Zhang 0002	Realization of L2 Cache Defect Tolerance Using Multi-bit ECC.	DFT	2008	DBLP DOI BibTeX RDF
51	Rahul Jain 0004, Anindita Mukherjee, Kolin Paul	Defect-Aware Design Paradigm for Reconfigurable Architectures.	ISVLSI	2006	DBLP DOI BibTeX RDF
48	Arvind Kumar, Sandip Tiwari	Testing and Defect Tolerance: A Rent's Rule Based Analysis and Implications on Nanoelectronics.	DFT	2004	DBLP DOI BibTeX RDF
47	Kristian Granhaug, Snorre Aunet	Improving Yield and Defect Tolerance in Subthreshold CMOS Through Output-Wired Redundancy.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	Subthreshold CMOS, Output-wired redundancy, Yield and defect tolerance
47	Israel Koren, Zahava Koren	Analysis of a Hybrid Defect-Tolerance Scheme for High-Density Memory ICs.	DFT	1997	DBLP DOI BibTeX RDF	Memory IC, yield, defect-tolerance
45	Kouhi Shinohara, Minoru Watanabe	Defect tolerance of holographic configurations in ORGAs.	IPDPS	2008	DBLP DOI BibTeX RDF
45	Glenn H. Chapman, Vijay K. Jain	Defect Tolerance for a Capacitance Based Nanoscale Biosensor.	DFT	2008	DBLP DOI BibTeX RDF
45	S. Ramsundar, Ahmad A. Al-Yamani, Dhiraj K. Pradhan	Defect Tolerance in Nanotechnology Switches Using a Greedy Reconfiguration Algorithm.	ISQED	2007	DBLP DOI BibTeX RDF
43	Mehdi Baradaran Tahoori	Application-independent defect-tolerant crossbar nano-architectures.	ICCAD	2006	DBLP DOI BibTeX RDF
41	Yoonjae Huh, Yoon-Hwa Choi	Module Grouping for Defect Tolerance in Nanoscale Memory.	DFT	2008	DBLP DOI BibTeX RDF
40	Teijiro Isokawa, Shin'ya Kowada, Ferdinand Peper, Naotake Kamiura, Nobuyuki Matsui	Online isolation of defects in cellular nanocomputers.	Frontiers Comput. Sci. China	2007	DBLP DOI BibTeX RDF	radom fly, cellular automata, asynchronous, nanotechnology, defect tolerance
39	Vinu Vijay Kumar, John C. Lach	Heterogeneous Redundancy for Fault and Defect Tolerance with Complexity Independent Area Overhead.	DFT	2003	DBLP DOI BibTeX RDF
39	Mahim Mishra, Seth Copen Goldstein	Defect Tolerance at the End of the Roadmap.	ITC	2003	DBLP DOI BibTeX RDF
39	W. Bruce Culbertson, Rick Amerson, Richard J. Carter, Philip Kuekes, Greg Snider	Defect tolerance on the Teramac custom computer.	FCCM	1997	DBLP DOI BibTeX RDF
38	Konstantin Likharev	Defect-Tolerant Hybrid CMOS/Nanoelectronic Circuits.	DFT	2008	DBLP DOI BibTeX RDF
37	Teijiro Isokawa, Shin'ya Kowada, Yousuke Takada, Ferdinand Peper, Naotake Kamiura, Nobuyuki Matsui	Defect-Tolerance in Cellular Nanocomputers.	New Gener. Comput.	2007	DBLP DOI BibTeX RDF	Cellular Automata, Configurability, Asynchronous, Nanotechnology, Defect Tolerance
37	Mehdi Baradaran Tahoori	Application-independent defect tolerance of reconfigurable nanoarchitectures.	ACM J. Emerg. Technol. Comput. Syst.	2006	DBLP DOI BibTeX RDF	reconfigurable architectures, nanotechnology, Defect tolerance
37	Fausto Distante, Mariagiovanna Sami, Renato Stefanelli	Array partitioning to achieve defect tolerance.	EUROMICRO	1997	DBLP DOI BibTeX RDF	array partitioning, processing arrays, run time faults, reconfiguration techniques, architectural regularity, interconnection channel width, reconfiguration efficiency, partitioning approach, critical fault patterns, fault tolerance, redundancy, reconfigurable architectures, survival, defect tolerance, path length
36	Tao Xu 0002, Krishnendu Chakrabarty, Fei Su	Defect-Aware Synthesis of Droplet-Based Microfluidic Biochips.	VLSI Design	2007	DBLP DOI BibTeX RDF
36	Xiaohong Jiang 0001, Susumu Horiguchi, Yue Hao	Predicting the Yield Efficacy of a Defect-Tolerant Embedded Core.	DFT	2000	DBLP DOI BibTeX RDF
36	Marco Broglia, Giacomo Buonanno, Mariagiovanna Sami, M. Selvini	Designing for Yield: A Defect-Tolerant Approach to High-Level Synthesis.	DFT	1998	DBLP DOI BibTeX RDF	Slice, Defect Tolerance, Data-Path
35	Mohammad Tehranipoor, Reza M. Rad	Defect Tolerance for Nanoscale Crossbar-Based Devices.	IEEE Des. Test Comput.	2008	DBLP DOI BibTeX RDF
34	Mehdi Baradaran Tahoori	BISM: built-in self map for hybrid crossbar nano-architectures.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	crossbar array, emerging nanotechnologies, logic mapping
33	Lei Zhang 0008, Yinhe Han 0001, Qiang Xu 0001, Xiaowei Li 0001	Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology.	DATE	2008	DBLP DOI BibTeX RDF
32	Shu Li, Tong Zhang 0002	Exploratory study on circuit and architecture design of very high density diode-switch phase change memories.	ISQED	2009	DBLP DOI BibTeX RDF
32	Vamsi Vankamamidi, Fabrizio Lombardi	Design of defect tolerant tile-based QCA circuits.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	missing cell, simulation, qca
32	Timothy J. Dysart, Peter M. Kogge	System Reliabilities When Using Triple Modular Redundancy in Quantum-Dot Cellular Automata.	DFT	2008	DBLP DOI BibTeX RDF
30	Reza M. Rad, Mohammad Tehranipoor	SCT: An Approach For Testing and Configuring Nanoscale Devices.	VTS	2006	DBLP DOI BibTeX RDF
30	Mehdi Baradaran Tahoori	Defects, Yield, and Design in Sublithographic Nano-electronics.	DFT	2005	DBLP DOI BibTeX RDF
30	Bogdan M. Maziarz, Vijay K. Jain	Automatic Reconfiguration and Yield of the TESH Multicomputer Network.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	TESH, fault-tolerance, routing, VLSI, Interconnection networks, reconfiguration, redundancy, yield, hierarchical networks, manufacturing defects, parallel computing systems, ULSI
30	V. Hecht, Karsten Rönner, Peter Pirsch	A defect-tolerant systolic array implementation for real time image processing.	J. VLSI Signal Process.	1993	DBLP DOI BibTeX RDF
29	Wei Xu 0021, Yiran Chen 0001, Xiaobin Wang, Tong Zhang 0002	Improving STT MRAM storage density through smaller-than-worst-case transistor sizing.	DAC	2009	DBLP DOI BibTeX RDF	STT MRAM, defect tolerance, transistor sizing
29	Jing Huang 0001, Mariam Momenzadeh, Fabrizio Lombardi	On the Tolerance to Manufacturing Defects in Molecular QCA Tiles for Processing-by-wire.	J. Electron. Test.	2007	DBLP DOI BibTeX RDF	processing by wire, emerging technologies, defect tolerance, QCA
28	Kristian Granhaug, Snorre Aunet	Improving Yield and Defect Tolerance in Multifunction Subthreshold CMOS Gates.	DFT	2006	DBLP DOI BibTeX RDF
28	Mariam Momenzadeh, Jing Huang 0001, Fabrizio Lombardi	Defect Characterization and Tolerance of QCA Sequential Devices and Circuits.	DFT	2005	DBLP DOI BibTeX RDF
28	Debayan Bhaduri, Sandeep K. Shukla	NANOPRISM: a tool for evaluating granularity vs. reliability trade-offs in nano architectures.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	CTMR, defect-tolerant architecture, nanotechnology, granularity, TMR, PRISM
23	Shuo Wang, Jianwei Dai, Lei Wang 0003	Defect-tolerant digital filtering with unreliable molecular electronics.	SiPS	2008	DBLP DOI BibTeX RDF
23	Hayssam El-Razouk, Zine Abid	A New Transistor-Redundant Voter for Defect-Tolerant Digital Circuits.	CCECE	2006	DBLP DOI BibTeX RDF
23	Shanrui Zhang, Minsu Choi, Nohpill Park	Modeling Yield of Carbon-Nanotube/Silicon-Nanowire FET-Based Nanoarray Architecture with h-hot Addressing Scheme.	DFT	2004	DBLP DOI BibTeX RDF
23	Gethin Norman, David Parker 0001, Marta Z. Kwiatkowska, Sandeep K. Shukla	Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking.	VLSI Design	2004	DBLP DOI BibTeX RDF
21	Michael Crocker, Xiaobo Sharon Hu, Michael T. Niemier	Defects and faults in QCA-based PLAs.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	logic mapping, Nanotechnology, faults, defects, quantum-dot cellular automata
21	Somnath Paul, Swarup Bhunia	MBARC: A scalable memory based reconfigurable computing framework for nanoscale devices.	ASP-DAC	2008	DBLP DOI BibTeX RDF
21	Tadashi Kunieda, Teijiro Isokawa, Ferdinand Peper, Ayumu Saitoh, Naotake Kamiura, Nobuyuki Matsui	Reconfiguring Circuits Around Defects in Self-Timed Cellular Automata.	ACRI	2008	DBLP DOI BibTeX RDF
21	Dmitri B. Strukov, Konstantin K. Likharev	A reconfigurable architecture for hybrid CMOS/Nanodevice circuits.	FPGA	2006	DBLP DOI BibTeX RDF	integrated hybrid circuits, architecture, programmable logic, nanoelectronics, programmable interconnect
21	Teijiro Isokawa, Shin'ya Kowada, Ferdinand Peper, Naotake Kamiura, Nobuyuki Matsui	Online Marking of Defective Cells by Random Flies.	ACRI	2006	DBLP DOI BibTeX RDF
21	Abderrahim Doumar, Satoshi Kaneko, Hideo Ito	Defect and Fault Tolerance FPGAs by Shifting the Configuration Data.	DFT	1999	DBLP DOI BibTeX RDF
19	John R. Samson Jr., Wilfrido Alejandro Moreno, Fernando J. Falquez	Validating fault tolerant designs using laser fault injection (LFI).	DFT	1997	DBLP DOI BibTeX RDF	fault tolerant designs validation, laser fault injection, VHSIC technology, in situ testing, transient error conditions, VLSI, faults, automated testing, transient, VLSI technology
19	Xiaojun Ma, Masoud Hashempour, Lei Wang 0003, Fabrizio Lombardi	Manufacturing yield of QCA circuits by synthesized DNA self-assembled templates.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	design, manufacturing, nanotechnology, defect tolerance
19	Siddhartha Datta, Bharat Joshi, Arun Ravindran, Arindam Mukherjee 0001	Efficient parallel testing and diagnosis of digital microfluidic biochips.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	Microfluidic biochip, droplet flooding, fault tolerance, testing, reconfigurability, defect tolerance, multiple faults, microfluidics
19	Muzaffer O. Simsir, Srihari Cadambi, Franjo Ivancic, Martin Rötteler, Niraj K. Jha	A hybrid nano-CMOS architecture for defect and fault tolerance.	ACM J. Emerg. Technol. Comput. Syst.	2009	DBLP DOI BibTeX RDF	nanotechnology, Defect tolerance, nanowires
19	Raphael Rubin, André DeHon	Choose-your-own-adventure routing: lightweight load-time defect avoidance.	FPGA	2009	DBLP DOI BibTeX RDF	bitstream load, in-field repair, defect tolerance, alternatives, programmable interconnect
19	Salvatore Pontarelli, Marco Ottavi, Vamsi Vankamamidi, Gian Carlo Cardarilli, Fabrizio Lombardi, Adelio Salsano	Analysis and Evaluations of Reliability of Reconfigurable FPGAs.	J. Electron. Test.	2008	DBLP DOI BibTeX RDF	FPGA, Reliability, Fault model, Defect tolerance
19	Michael Leuchtenburg, Pritish Narayanan, Teng Wang, Csaba Andras Moritz	Impact of Process Variation in Fault-Resilient Streaming Nanoprocessors.	NanoNet	2008	DBLP DOI BibTeX RDF	nanoscale processor, process variation, defect tolerance
19	Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang 0011, Michael Orshansky	Architecting a reliable CMP switch architecture.	ACM Trans. Archit. Code Optim.	2007	DBLP DOI BibTeX RDF	CMP switch, reliability, defect-tolerance
19	Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck	A self-organizing defect tolerant SIMD architecture.	ACM J. Emerg. Technol. Comput. Syst.	2007	DBLP DOI BibTeX RDF	Self-organizing, SIMD, data parallel, DNA, defect tolerance, nanocomputing, bit-serial
19	Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck, Daniel J. Sorin	NANA: A nano-scale active network architecture.	ACM J. Emerg. Technol. Comput. Syst.	2006	DBLP DOI BibTeX RDF	Accumulator ISA, defect isolation, reverse path forwarding, active network, DNA, defect tolerance, self-assembly, carbon nanotube, nanoelectronics, nanocomputing
19	Song Peng, Rajit Manohar	Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	asynchronous circuits, yield, defect tolerance, 3D integration, self-reconfiguration
19	Jaidev P. Patwardhan, Vijeta Johri, Chris Dwyer, Alvin R. Lebeck	A defect tolerant self-organizing nanoscale SIMD architecture.	ASPLOS	2006	DBLP DOI BibTeX RDF	self-organizing, SIMD, data parallel, DNA, defect tolerance, nanocomputing, bit-serial
19	Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein, Mihai Budiu	Tartan: evaluating spatial computation for whole program execution.	ASPLOS	2006	DBLP DOI BibTeX RDF	low power, asynchronous circuits, reconfigurable hardware, defect tolerance, spatial computation, dataflow machine
19	André DeHon	Nanowire-based programmable architectures.	ACM J. Emerg. Technol. Comput. Syst.	2005	DBLP DOI BibTeX RDF	Manhattan mesh, stochastic construction, sublithographic architecture, programmable logic arrays, Defect tolerance, nanowires, programmable interconnect
19	Rajesh K. Gupta 0001	Nanotechnology: Where science of the small meets math of the large.	IEEE Des. Test Comput.	2005	DBLP DOI BibTeX RDF	scalability, integration, reconfiguration, nanotechnology, defect tolerance
19	Chen He, Margarida F. Jacome, Gustavo de Veciana	A Reconfiguration-Based Defect-Tolerant Design Paradigm for Nanotechnologies.	IEEE Des. Test Comput.	2005	DBLP DOI BibTeX RDF	probabilistic design, reconfiguration, Nanotechnologies, defect tolerance
19	Mariam Momenzadeh, Marco Ottavi, Fabrizio Lombardi	Modeling QCA Defects at Molecular-level in Combinational Circuits.	DFT	2005	DBLP DOI BibTeX RDF	fault model, emerging technology, defect tolerance, QCA
19	Fei Su, Krishnendu Chakrabarty	Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips.	DAC	2005	DBLP DOI BibTeX RDF	synthesis, placement, defect tolerance, microfluidics, biochip
19	Marco Ottavi, Xiaopeng Wang, Fred J. Meyer, Fabrizio Lombardi	Simulation of reconfigurable memory core yield.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	Markov chain, manufacturability, yield, defect tolerance
19	Margarida F. Jacome, Chen He, Gustavo de Veciana, Stephen Bijansky	Defect tolerant probabilistic design paradigm for nanotechnologies.	DAC	2004	DBLP DOI BibTeX RDF	probabilistic design, nanotechnologies, defect tolerance
19	Fred J. Meyer, Nohpill Park	Predicting Defect-Tolerant Yield in the Embedded Core Context.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Yield, integrated circuit, defect tolerance, embedded core
19	Thomas S. Barnett, Adit D. Singh, Victor P. Nelson	Yield-Reliability Modeling for Fault Tolerant Integrated Circuits.	DFT	2001	DBLP DOI BibTeX RDF	infant mortality, negative binomial distribution, clustering, reliability, redundancy, yield, defects, defect tolerance, burn-in
19	Yves Audet, Glenn H. Chapman	Design of a Self-Correcting Active Pixel Sensor.	DFT	2001	DBLP DOI BibTeX RDF	defect tolerance, digital cameras, Active Pixel Sensors
19	Weiping Shi, Ming-Feng Chang, W. Kent Fuchs	Harvest Rate of Reconfigurable Pipelines.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF	Harvest rate, pipelines, yield, random graphs, defect tolerance, percolation, reconfigurable arrays
19	Claude Thibeault, Yvon Savaria, Jean-Louis Houle	A Fast Method to Evaluate the Optimum Number of Spares in Defect-Tolerant Integrated Circuits.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	defect-tolerant integrated circuits, optimum number of spares, reconfiguration strategies, optimum redundancy, VLSI, logic testing, redundancy, defect tolerance, circuit reliability, yield models, integrated circuit manufacture
18	Takuto Nishimura, Yuya Ichikawa, Akira Goda, Naoko Misawa, Chihiro Matsui, Ken Takeuchi	Stochastic Computing-based Computation-in-Memory (SC CiM) Architecture for DNNs and Hierarchical Evaluations of Non-volatile Memory Error and Defect Tolerance.	IMW	2023	DBLP DOI BibTeX RDF
18	Shiva Shankar Thiagarajan, Suriyaprakash Natarajan, Yiorgos Makris	A defect tolerance framework for improving yield.	DAC	2022	DBLP DOI BibTeX RDF
18	Sebastian Dengler, Said Lahriri, Emanuel Trunzer, Birgit Vogel-Heuser	Applied machine learning for a zero defect tolerance system in the automated assembly of pharmaceutical devices.	Decis. Support Syst.	2021	DBLP DOI BibTeX RDF
18	Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri	TSV-Cluster Defect Tolerance Using Tree-Based Redundancy for Yield Improvement of 3-D ICs.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2021	DBLP DOI BibTeX RDF
18	Tanmoy Chaku, Aarjesh Rakshit, Ismail Sarkar, Malay Kule	On Defect Tolerance of Nanocrossbar Arrays using Divide and Conquer Technique.	ISDCS	2021	DBLP DOI BibTeX RDF
18	Samiya Mahjabin, Md Mahfuzul Haque, Md. Khan Sobayel Bin Rafiq, M. S. Jamal, Mohammad Aminul Islam, V. Selvanathan, Abdulaziz K. Assaifan, Hamad F. Alharbi, K. Sopian, Nowshad Amin, Md. Akhtaruzzaman	Perceiving of Defect Tolerance in Perovskite Absorber Layer for Efficient Perovskite Solar Cell.	IEEE Access	2020	DBLP DOI BibTeX RDF
18	Xiaojing Zha, Yinshui Xia	Defective cell reuse based defect-tolerance method for CMOL cell mapping optimization.	Microelectron. J.	2020	DBLP DOI BibTeX RDF
18	Suriyaprakash Natarajan, Andres F. Malavasi, Pascal Andreas Meinerzhagen	Automated Design For Yield Through Defect Tolerance.	VTS	2020	DBLP DOI BibTeX RDF
18	Onur Tunali, Mustafa Altun	A Fast Logic Mapping Algorithm for Multiple-Type-Defect Tolerance in Reconfigurable Nano-Crossbar Arrays.	IEEE Trans. Emerg. Top. Comput.	2019	DBLP DOI BibTeX RDF
18	Hossein Pourmeidani, Mehdi Habibi	A Range Matching CAM for Hierarchical Defect Tolerance Technique in NRAM Structures.	CoRR	2019	DBLP BibTeX RDF