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Publication years (Num. hits)
2000-2004 (17) 2005-2006 (18) 2007-2008 (23) 2009-2010 (22) 2011-2012 (23) 2013 (15) 2014 (26) 2015 (41) 2016 (39) 2017 (53) 2018 (65) 2019 (70) 2020 (61) 2021 (65) 2022 (80) 2023 (65) 2024 (24)
Publication types (Num. hits)
article(267) inproceedings(434) phdthesis(6)
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Found 708 publication records. Showing 707 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
179Xiangyu Dong, Xiaoxia Wu, Guangyu Sun 0003, Yuan Xie 0001, Hai Li 0001, Yiran Chen 0001 Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF 3D stacking, MRAM
173Bruce F. Cockburn The Emergence of High-Density Semiconductor-Compatible Spintronic Memory. Search on Bibsonomy ICMENS The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
162Weisheng Zhao, Eric Belhaire, Claude Chappert, Bernard Dieny, Guillaume Prenat TAS-MRAM-Based Low-Power High-Speed Runtime Reconfiguration (RTR) FPGA. Search on Bibsonomy ACM Trans. Reconfigurable Technol. Syst. The full citation details ... 2009 DBLP  DOI  BibTeX  RDF Look-Up Table (LUT), MTJ, TAS, multi-context configuration, nonvolatile, Simulation, FPGA, architecture, low power, dynamical reconfiguration, flip-flop, MRAM
156Bruce F. Cockburn Tutorial on Magnetic Tunnel Junction Magnetoresistive Random-Access Memory. Search on Bibsonomy MTDT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
154Chin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Chien-Chung Hung, Young-Shying Chen, Ding-Yeong Wang, Yuan-Jen Lee, Ming-Jer Kao Write Disturbance Modeling and Testing for MRAM. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
144Sheng-Hung Wang, Ching-Yi Chen, Cheng-Wen Wu Fast identification of operating current for toggle MRAM by spiral search. Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF reliability, testing, BIST, characterization, yield enhancement, MRAM
137Ethan L. Miller, Scott A. Brandt, Darrell D. E. Long HeRMES: High-Performance Reliable MRAM-Enabled Storage. Search on Bibsonomy HotOS The full citation details ... 2001 DBLP  DOI  BibTeX  RDF
120Guangyu Sun 0003, Xiangyu Dong, Yuan Xie 0001, Jian Li 0059, Yiran Chen 0001 A novel architecture of the 3D stacked MRAM L2 cache for CMPs. Search on Bibsonomy HPCA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
120Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu, Chien-Chung Hung, Ming-Jer Kao, Yeong-Jar Chang, Wen Ching Wu MRAM Defect Analysis and Fault Modeli. Search on Bibsonomy ITC The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
92Jing Li 0073, Charles Augustine, Sayeef S. Salahuddin, Kaushik Roy 0001 Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement. Search on Bibsonomy DAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF STT MRAM, yield
75Sumanta Chaudhuri, Weisheng Zhao, Jacques-Olivier Klein, Claude Chappert, Pascale Mazoyer Design of embedded MRAM macros for memory-in-logic applications. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2010 DBLP  DOI  BibTeX  RDF thermally assisted switching (tas), architecture, low power, system on chip (soc), embedded, mram, non-volatile
75Xiaochen Guo, Engin Ipek, Tolga Soyata Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing. Search on Bibsonomy ISCA The full citation details ... 2010 DBLP  DOI  BibTeX  RDF STT-MRAM, power-efficiency
75Wei Xu 0021, Yiran Chen 0001, Xiaobin Wang, Tong Zhang 0002 Improving STT MRAM storage density through smaller-than-worst-case transistor sizing. Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF STT MRAM, defect tolerance, transistor sizing
69Mike Mannion, Hermann Kaindl Requirements-based product line engineering. Search on Bibsonomy ESEC / SIGSOFT FSE The full citation details ... 2001 DBLP  DOI  BibTeX  RDF reuse, requirements, variability, product line engineering
68Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices. Search on Bibsonomy ISMVL The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
56Yoann Guillemenet, Syed Zahid Ahmed, Lionel Torres, Alexandre Martheley, Julien Eydoux, Jean-Baptiste Cuelle, Laurent Rouge, Gilles Sassatelli MRAM Based eFPGAs: Programming and Silicon Flows, Exploration Environments, MRAM Current State in Industry and Its Unique Potentials for FPGAs. Search on Bibsonomy ReConFig The full citation details ... 2009 DBLP  DOI  BibTeX  RDF FPGA, Dynamic Reconfiguration, MRAM, non volatility
52Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune A non-volatile run-time FPGA using thermally assisted switching MRAMS. Search on Bibsonomy FPL The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
52Yoshiaki Asao, Masayoshi Iwayama, Kenji Tsuchida, Akihiro Nitayama, Hiroaki Yoda, Hisanori Aikawa, Sumio Ikegawa, Tatsuya Kishi A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access Memory. Search on Bibsonomy DFT The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
51Mram Kahla, Zijian Gyozo Yang, Attila Novák Cross-lingual Fine-tuning for Abstractive Arabic Text Summarization. Search on Bibsonomy RANLP The full citation details ... 2021 DBLP  BibTeX  RDF
50Frank Wang A modified architecture for high-density MRAM. Search on Bibsonomy SIGARCH Comput. Archit. News The full citation details ... 2001 DBLP  DOI  BibTeX  RDF computer data storage, nonvolatility, parallel operation, storage density, random access memory
42Betty Prince Embedded non-volatile memories. Search on Bibsonomy SBCCI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FeRAM, MONOS, PC-RAM, SONOS, floating gate memory, nanocrystal memory, nitride storage memory, trapping site memory, flash memory, embedded memory, non-volatile memory, MRAM
42Betty Prince Nanotechnology and emerging memories. Search on Bibsonomy SBCCI The full citation details ... 2007 DBLP  DOI  BibTeX  RDF FeRAM, ferroelectric, floating body, nanocrystal, nitride storage, scaling issues, single electron memories, memory, variability, scaling, SRAM, MEMs, DRAM, flash, MRAM, phase change, non-volatile, molecular memory
35Jong-Chul Lim, Hye-Seung Yu, Jae-Suk Choi, Soo-Won Kim An advanced bit-line clamping scheme in magnetic RAM for wide sensing margin. Search on Bibsonomy ASP-DAC The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
33Jing Li 0073, Patrick Ndai, Ashish Goel, Haixin Liu, Kaushik Roy 0001 An alternate design paradigm for robust spin-torque transfer magnetic RAM (STT MRAM) from circuit/architecture perspective. Search on Bibsonomy ASP-DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF
33Yuui Shimizu, Hisanori Aikawa, Keiji Hosotani, Naoharu Shimomura, Tadashi Kai, Yoshihiro Ueda, Yoshiaki Asao, Yoshihisa Iwata, Kenji Tsuchida, Sumio Ikegawa MRAM Write Error Categorization with QCKB. Search on Bibsonomy MTDT The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
33Edward K. S. Au, Wing-Hung Ki, Wai Ho Mow, Silas T. Hung, Catherine Y. Wong A binary--search switched--current sensing scheme for 4-state MRAM. Search on Bibsonomy ACM Great Lakes Symposium on VLSI The full citation details ... 2004 DBLP  DOI  BibTeX  RDF magneto-resistive random access memory, switched-current
33Tetsuya Uemura, Masafumi Yamamoto Proposal of Four-Valued MRAM based on MTJ/RTD Structure. Search on Bibsonomy ISMVL The full citation details ... 2003 DBLP  DOI  BibTeX  RDF
33Ruili Zhang, William C. Black Jr., Marwan M. Hassoun Windowed MRAM Sensing Scheme. Search on Bibsonomy MTDT The full citation details ... 2000 DBLP  DOI  BibTeX  RDF
32Farah Ferdaus, Bashir Mohammad Sabquat Bahar Talukder, Md. Tauhidur Rahman 0001 Approximate MRAM: High-Performance and Power-Efficient Computing With MRAM Chips for Error-Tolerant Applications. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
32Haris Suhail, Jiyue Yang, Haoran He, Kang L. Wang, Sudhakar Pamarti Analytical Array-Level Comparison of Read/Write Performance Between Voltage Controlled-MRAM and STT-MRAM. Search on Bibsonomy MWSCAS The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
32Ming-Hung Wu, Ming-Chun Hong, Ching Shih, Yao-Jen Chang, Yu-Chen Hsin, Shih-Ching Chiu, Kuan-Ming Chen, Yi-Hui Su, Chih-Yao Wang, Shan-Yi Yang, Guan-Long Chen, Hsin-Han Lee, Sk. Ziaur Rahaman, I-Jung Wang, Chen-Yi Shih, Tsun-Chun Chang, Jeng-Hua Wei, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Tuo-Hung Hou U-MRAM: Transistor-Less, High-Speed (10 ns), Low-Voltage (0.6 V), Field-Free Unipolar MRAM for High-Density Data Memory. Search on Bibsonomy VLSI Technology and Circuits The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
32Loïc France Development and evaluation of solutions for the protection of DRAM and MRAM memories against Rowhammer attacks. (Développement et évaluation de solutions de protections des DRAM et MRAM contre l'attaque Rowhammer). Search on Bibsonomy 2022   RDF
32Farah Ferdaus, Bashir M. Sabquat Bahar Talukder, Md. Tauhidur Rahman 0001 Approximate MRAM: High-performance and Power-efficient Computing with MRAM Chips for Error-tolerant Applications. Search on Bibsonomy CoRR The full citation details ... 2021 DBLP  BibTeX  RDF
32Barry Hoberman, Jean-Pierre Nozieres SOT-MRAM - Third generation MRAM memory opens new opportunities : Hot Chips Conference August 2021. Search on Bibsonomy HCS The full citation details ... 2021 DBLP  DOI  BibTeX  RDF
32Mounia Kharbouche-Harrari Hybridation CMOS/STT-MRAM des circuits intégrés pour la sécurité matérielle de l'internet des Objets. (CMOS/STT-MRAM hybridization of integrated circuits for the hardware security of the Internet of Things). Search on Bibsonomy 2019   RDF
32Jayita Das, Kevin Scott, Sanjukta Bhanja MRAM PUF: Using Geometric and Resistive Variations in MRAM Cells. Search on Bibsonomy ACM J. Emerg. Technol. Comput. Syst. The full citation details ... 2016 DBLP  DOI  BibTeX  RDF
32Hiroki Noguchi, Kumiko Nomura, Keiko Abe, Shinobu Fujita, Eishi Arima, Kyundong Kim, Takashi Nakada, Shinobu Miwa, Hiroshi Nakamura D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory. Search on Bibsonomy DATE The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
32Jisu Kim, Kyungho Ryu, Seung-Hyuk Kang, Seong-Ook Jung A Novel Sensing Circuit for Deep Submicron Spin Transfer Torque MRAM (STT-MRAM). Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
32William J. Gallagher, Stuart S. P. Parkin Development of the magnetic tunnel junction MRAM at IBM: From first junctions to a 16-Mb MRAM demonstrator chip. Search on Bibsonomy IBM J. Res. Dev. The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
25Erwin J. Prinz The zen of nonvolatile memories. Search on Bibsonomy DAC The full citation details ... 2006 DBLP  DOI  BibTeX  RDF FeRAM, SONOS, nanocrystal, oating gate, phase change memory, MRAM, nonvolatile memories
17In Hwan Doh, Young Jin Kim, Jung Soo Park, Eunsam Kim, Jongmoo Choi, Donghee Lee 0001, Sam H. Noh Towards greener data centers with storage class memory: minimizing idle power waste through coarse-grain management in fine-grain scale. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2010 DBLP  DOI  BibTeX  RDF non-volatile ram (nvram), storage class memory (scm), power management, servers
17Xiaoxia Wu, Jian Li 0059, Lixin Zhang 0002, Evan Speight, Ramakrishnan Rajamony, Yuan Xie 0001 Hybrid cache architecture with disparate memory technologies. Search on Bibsonomy ISCA The full citation details ... 2009 DBLP  DOI  BibTeX  RDF hybrid cache architecture, three-dimensional ic
17Y. Hosogaya, Toshio Endo, Satoshi Matsuoka Performance evaluation of parallel applications on next generation memory architecture with power-aware paging method. Search on Bibsonomy IPDPS The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17William Enck, Kevin R. B. Butler, Thomas Richardson, Patrick D. McDaniel, Adam D. Smith Defending Against Attacks on Main Memory Persistence. Search on Bibsonomy ACSAC The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
17Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa, Luigi Carro A low-SER efficient core processor architecture for future technologies. Search on Bibsonomy DATE The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17In Hwan Doh, Jongmoo Choi, Donghee Lee 0001, Sam H. Noh Exploiting non-volatile RAM to enhance flash file system performance. Search on Bibsonomy EMSOFT The full citation details ... 2007 DBLP  DOI  BibTeX  RDF non-volatile RAM, metadata, file system, flash memory, experimental evaluation
17Tetsuya Uemura, Takao Marukame, Ken-ichi Matsuda, Masafumi Yamamoto Four-State Magnetic Random Access Memory and Ternary Content Addressable Memory Using CoFe-Based Magnetic Tunnel Junctions. Search on Bibsonomy ISMVL The full citation details ... 2007 DBLP  DOI  BibTeX  RDF
17Michael T. Niemier, M. Alam, Xiaobo Sharon Hu, Gary H. Bernstein, Wolfgang Porod, M. Putney, J. DeAngelis Clocking structures and power analysis for nanomagnet-based logic devices. Search on Bibsonomy ISLPED The full citation details ... 2007 DBLP  DOI  BibTeX  RDF magnetic logic, nanotechnology, clocking, QCA
17Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon New non-volatile FPGA concept using Magnetic Tunneling Junction. Search on Bibsonomy ISVLSI The full citation details ... 2006 DBLP  DOI  BibTeX  RDF
17Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon Magnetic tunnelling junction based FPGA. Search on Bibsonomy FPGA The full citation details ... 2006 DBLP  DOI  BibTeX  RDF magnetic tunneling junction, FPGA, non volatility
17Feng Wang 0003, Bo Hong, Scott A. Brandt, Darrell D. E. Long Using MEMS-Based Storage to Boost Disk Performance. Search on Bibsonomy MSST The full citation details ... 2005 DBLP  DOI  BibTeX  RDF
17Frank Bellosa When physical is not real enough. Search on Bibsonomy ACM SIGOPS European Workshop The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
17John Y. Fong, Randy Acklin, John Roscher, Feng Li, Cindy Laird, Cezary Pietrzyk Nonvolatile Repair Caches Repair Embedded SRAM and New Nonvolatile Memories. Search on Bibsonomy DFT The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
16Ryotaro Ohara, Atsushi Fukunaga, Masakazu Taichi, Masaya Kabuto, Riku Hamabe, Masato Ikegawa, Shintaro Izumi, Hiroshi Kawaguchi 0001 A Case Study for Improving Performances of Deep-Learning Processor with MRAM. Search on Bibsonomy IPSJ Trans. Syst. LSI Des. Methodol. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16De-Qi You, Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang An 8b-Precision 8-Mb STT-MRAM Near-Memory-Compute Macro Using Weight-Feature and Input-Sparsity Aware Schemes for Energy-Efficient Edge AI Devices. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Takahiro Shimoi, Ken Matsubara, Tomoya Saito, Tomoya Ogawa, Yasuhiko Taito, Yoshinobu Kaneda, Masayuki Izuna, Koichi Takeda, Hidenori Mitani, Takashi Ito, Takashi Kono A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C. Search on Bibsonomy IEEE J. Solid State Circuits The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16H. D. Kallinatha, Sadhana Rai, Basavaraj Talawar A Detailed Study of SOT-MRAM as an Alternative to DRAM Primary Memory in Multi-Core Environment. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Ivan Fernandez, Christina Giannoula, Aditya Manglik, Ricardo Quislant, Nika Mansouri-Ghiasi, Juan Gómez-Luna, Eladio Gutiérrez, Oscar G. Plata, Onur Mutlu MATSA: An MRAM-Based Energy-Efficient Accelerator for Time Series Analysis. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Belal Jahannia, Seyed Ali Ghasemi, Hamed Farbeh Multi-Retention STT-MRAM Architectures for IoT: Evaluating the Impact of Retention Levels and Memory Mapping Schemes. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Alaba Yusuf, Tosiron Adegbija, Dhruv Gajaria Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey. Search on Bibsonomy IEEE Access The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Sureum Choi, Daejin Han, Chanyeong Choi, Yeongkyo Seo Layout-Aware Area Optimization of Transposable STT-MRAM for a Processing-In-Memory System. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16YaJuan Hui, Qingzhen Li, Leimin Wang, Cheng Liu 0008, Deming Zhang, Xiangshui Miao In-Memory Wallace Tree Multipliers Based on Majority Gates Within Voltage-Gated SOT-MRAM Crossbar Arrays. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Jia-Le Cui, Yanan Guo 0004, Juntong Chen, Bo Liu 0019, Hao Cai Sparsity-Oriented MRAM-Centric Computing for Efficient Neural Network Inference. Search on Bibsonomy IEEE Trans. Emerg. Top. Comput. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Yongliang Zhou, Zixuan Zhou, Yiming Wei, Zhen Yang, Xiao Lin, Chenghu Dai, Licai Hao, Chunyu Peng, Hao Cai, Xiulong Wu A CFMB STT-MRAM-Based Computing-in-Memory Proposal With Cascade Computing Unit for Edge AI Devices. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Chao Wang 0094, Zhaohao Wang, Shixing Li, Zhongkui Zhang, Youguang Zhang Variation Aware Evaluation Approach and Design Methodology for SOT-MRAM. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Lichuan Luo, Erya Deng, Dijun Liu, Zhen Wang, Weiliang Huang, He Zhang 0011, Xiao Liu, Jinyu Bai, Junzhan Liu, Youguang Zhang, Wang Kang 0001 CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Zhongzhen Tong, Yilin Xu, Yunlong Liu, Xinrui Duan, Hao Tang, Suteng Zhao, Chenghang Li, Zhiting Lin, Xiulong Wu, Zhaohao Wang, Xiaoyang Lin A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Jinkai Wang, Zhengkun Gu, Bojun Zhang, Youxiang Chen, Zekun Wang, Kun Zhang 0030, Youguang Zhang, Yue Zhang 0010 RSACIM: Resistance Summation Analog Computing in Memory With Accuracy Optimization Scheme Based on MRAM. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Haotian Fu, Yulong Huang, Tingran Chen, Chenyi Fu, Hongwei Ren, Yue Zhou, Shouzhong Peng, Zhirui Zong, Biao Pan, Bojun Cheng DS-CIM: A 40nm Asynchronous Dual-Spike Driven, MRAM Compute-In-Memory Macro for Spiking Neural Network. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Belal Jahannia, Seyed Ali Ghasemi, Hamed Farbeh An Energy Efficient Multi-Retention STT-MRAM Memory Architecture for IoT Applications. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Haoran Du, You Wang 0002, Jun Yang 0006, Hao Cai Intrinsic MRAM Properties Enable Security Circuits. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16YaJuan Hui, Qingzhen Li, Cheng Liu 0008, Deming Zhang, Xiangshui Miao Logic-in-Memory Based on Majority Gates With Voltage-Gated SOT-MRAM Crossbar Arrays. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Chao Wang 0094, Zhaohao Wang, Zhongkui Zhang, Youguang Zhang, Weisheng Zhao Area and Energy Efficient Short-Circuit-Logic-Based STT-MRAM Crossbar Array for Binary Neural Networks. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Kaniz Mishty, Mehdi Sadi System and Design Technology Co-Optimization of SOT-MRAM for High-Performance AI Accelerator Memory System. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Yu Gu, Puyang Huang, Tianhao Chen, Chenyi Fu, Aitian Chen, Shouzhong Peng, Xixiang Zhang, Xufeng Kou A noise-tolerant, resource-saving probabilistic binary neural network implemented by the SOT-MRAM compute-in-memory system. Search on Bibsonomy CoRR The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Ku-Feng Lin, Hiroki Noguchi, Yi-Chun Shih, Perng-Fei Yuh, Yuan-Jen Lee, Tung-Cheng Chang, Sheng-Po Huang, Yu-Fan Lin, Chun-Ying Lee, Yen-Hsiang Huang, Jui-Che Tsai, Saman Adham, Peter Noel, Ramin Yazdi, Marat Gershoig, YangJae Shin, Vineet Joshi, Ted Wong, Meng-Ru Jiang, J. J. Wu, Chun-Tai Cheng, Yu-Jen Wang, Harry Chuang, Yu-Der Chih, Yih Wang, Tsung-Yung Jonathan Chang 15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes. Search on Bibsonomy ISSCC The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Tomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito, Masayuki Izuna, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono 15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs. Search on Bibsonomy ISSCC The full citation details ... 2024 DBLP  DOI  BibTeX  RDF
16Tatiana Moposita, Esteban Garzón, Raffaele De Rose, Felice Crupi, Andrei Vladimirescu, Lionel Trojman, Marco Lanuzza SIMPLY+: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Yongwoon Song, Munhyung Lee, Hyukjun Lee High Bandwidth and Highly Available Packet Buffer Design Using Multi-Retention Time MRAM. Search on Bibsonomy IEEE Access The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Tao Li 0005, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh Hybrid Signed Convolution Module With Unsigned Divide-and-Conquer Multiplier for Energy-Efficient STT-MRAM-Based AI Accelerator. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Shaopu Han, Yanfeng Jiang RISC-V-Based Evaluation and Strategy Exploration of MRAM Triple-Level Hybrid Cache Systems. Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Tao Li 0005, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh Corrections to "Hybrid Signed Convolution Module With Unsigned Divide-and-Conquer Multiplier for Energy-Efficient STT-MRAM-Based AI Accelerator". Search on Bibsonomy IEEE Trans. Very Large Scale Integr. Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Yueting Li, Tianshuo Bai, Xinyi Xu, Yundong Zhang, Bi Wu, Hao Cai, Biao Pan, Weisheng Zhao A Survey of MRAM-Centric Computing: From Near Memory to In Memory. Search on Bibsonomy IEEE Trans. Emerg. Top. Comput. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Arash Salahvarzi, Mohsen Khosroanjam, Amir Mahdi Hosseini Monazzah, Hakem Beitollahi, Ümit Y. Ogras, Mahdi Fazeli WiSE: When Learning Assists Resolving STT-MRAM Efficiency Challenges. Search on Bibsonomy IEEE Trans. Emerg. Top. Comput. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Shadi Sheikhfaal, Shaahin Angizi, Ronald F. DeMara Energy-Efficient Recurrent Neural Network With MRAM-Based Probabilistic Activation Functions. Search on Bibsonomy IEEE Trans. Emerg. Top. Comput. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Bi Wu, Haonan Zhu, Ke Chen 0018, Chenggang Yan 0002, Weiqiang Liu 0001 MLiM: High-Performance Magnetic Logic in-Memory Scheme With Unipolar Switching SOT-MRAM. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16An Yang, Zhilin Jiang, Zheng Huang, Zitong Zhang, Yanfeng Jiang Double-Ended Superposition Anti-Noise Resistance Monitoring Write Termination Scheme for Reliable Write Operation in STT-MRAM. Search on Bibsonomy IEEE Trans. Circuits Syst. I Regul. Pap. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Xunming Zhang, Long Liu, Di Wang, Ruijun Lin, Heyong Yang, Xiaoxin Xu, Jianguo Yang, Guozhong Xing, Xiaoyong Xue, Xiaoyang Zeng Area-Efficient 1T-2D-2MTJ SOT-MRAM Cell for High Read Performance. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Enlong Liu, Kunkun Li, Ao Shen, Shikun He Area and Energy Efficient SOT-MRAM Bit Cell Based on 3 Transistors With Shared Diffusion Regions. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Taehui Na Ternary Output Binary Neural Network With Zero-Skipping for MRAM-Based Digital In-Memory Computing. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Alok Kumar Shukla, Sandeep Soni, Brajesh Kumar Kaushik Novel Radiation Hardened DSOT-MRAM Read Peripheral Circuit With Reduced Sensitive Nodes. Search on Bibsonomy IEEE Trans. Circuits Syst. II Express Briefs The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge Rethinking DRAM's Page Mode With STT-MRAM. Search on Bibsonomy IEEE Trans. Computers The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Wei Zhao 0034, Dan Feng 0001, Wei Tong 0001, Jingning Liu, Zhangyu Chen, Bing Wu 0001, Chengning Wang APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Chao Wang 0094, Zhaohao Wang, Zhongkui Zhang, Jiagao Feng, Youguang Zhang, Weisheng Zhao Layout Aware Optimization Methodology for SOT-MRAM Based on Technically Feasible Top-Pinned Magnetic Tunnel Junction Process. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Wei Zhao 0034, Jie Xu 0013, Xueliang Wei, Bing Wu 0001, Chengning Wang, Weilin Zhu, Wei Tong 0001, Dan Feng 0001, Jingning Liu A Low-Latency and High-Endurance MLC STT-MRAM-Based Cache System. Search on Bibsonomy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Yinglin Zhao, Jianlei Yang 0001, Bing Li, Xingzhou Cheng, Xucheng Ye, Xueyan Wang, Xiaotao Jia, Zhaohao Wang, Youguang Zhang, Weisheng Zhao NAND-SPIN-based processing-in-MRAM architecture for convolutional neural network acceleration. Search on Bibsonomy Sci. China Inf. Sci. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Yueting Li, Wang Kang 0001, Kunyu Zhou, Keni Qiu, Weisheng Zhao Experimental Demonstration of STT-MRAM-based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies. Search on Bibsonomy ACM Trans. Embed. Comput. Syst. The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Sourjya Roy, Cheng Wang, Anand Raghunathan Evaluation of STT-MRAM as a Scratchpad for Training in ML Accelerators. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Kaniz Mishty, Mehdi Sadi System and Design Technology Co-optimization of SOT-MRAM for High-Performance AI Accelerator Memory System. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
16Arpan Suravi Prasad, Moritz Scherer, Francesco Conti 0001, Davide Rossi, Alfio Di Mauro, Manuel Eggimann, Jorge Tomás Gómez, Ziyun Li, Syed Shakib Sarwar, Zhao Wang, Barbara De Salvo, Luca Benini Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality with At-MRAM Neural Engine. Search on Bibsonomy CoRR The full citation details ... 2023 DBLP  DOI  BibTeX  RDF
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