Search results for "output"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
80	René de Vogelaere	Algorithms: Algorithm 335: a set of basic input-output procedures.	Commun. ACM	1968	DBLP DOI BibTeX RDF	ALGOL 60, Berkeley style, decompose integer, decompose real, equivalent ALGOL statements, fixed point representation, input echo, input outpur array, input output Boolean, input output procedures, integer format, out integer, output channel interpretation, output documentation, procedures relationship, quality output, read real, real format, ALGOL, style, transput, input output, floating point representation, floating point representational
66	Byungho Kim, Boseob Kwon, Hyunsoo Yoon, Seungryul Maeng, Jung Wan Cho	Performance Analysis of Multipath Multistage Interconnection Networks with Nonuniform Output Traffic Distribution.	PDP	1996	DBLP DOI BibTeX RDF	buffer circuits, multipath multistage interconnection networks, nonuniform output traffic distribution, delay-throughput performance, packet arrival rates, output module., performance evaluation, performance analysis, delays, probability, packet switching, multistage interconnection networks, telecommunication traffic, packet delay, losses, output buffers, packet loss probability
65	Hyoung-Il Lee, Seung-Woo Seo	Matching output queueing with a multiple input/output-queued switch.	IEEE/ACM Trans. Netw.	2006	DBLP DOI BibTeX RDF	combined input/output-queued (CIOQ) switch, multiple input/output-queued (MIOQ) switch, output queueing emulation, parallel switching architecture
50	Cheng-Shang Chang, Duan-Shin Lee, Ching-Ming Lien	Load balanced Birkhoff-von Neumann switches with resequencing.	SIGMETRICS Perform. Evaluation Rev.	2001	DBLP DOI BibTeX RDF
45	Sunil R. Das, Nishith Goel, Wen-Ben Jone, Amiya R. Nayak	Syndrome signature in output compaction for VLSI BIST.	VLSI Design	1996	DBLP DOI BibTeX RDF	syndrome signature, output compaction, VLSI BIST, input patterns, n-input combinational circuit, primary syndrome, subsyndromes, subfunctions, single-output circuit, multiple output, VLSI, logic testing, data compression, built-in self test, integrated circuit testing, combinational circuits, switching functions, exhaustive testing
42	Jérémy Barbay, Rolf Klein, Alejandro López-Ortiz, Rolf Niedermeier	09171 Executive Summary - Adaptive, Output Sensitive, Online and Parameterized Algorithms.	Adaptive, Output Sensitive, Online and Parameterized Algorithms	2009	DBLP BibTeX RDF
42	Jérémy Barbay, Rolf Klein, Alejandro López-Ortiz, Rolf Niedermeier	09171 Abstracts Collection - Adaptive, Output Sensitive, Online and Parameterized Algorithms.	Adaptive, Output Sensitive, Online and Parameterized Algorithms	2009	DBLP BibTeX RDF
41	Tudor Balanescu	Generalised Stream X-Machines with Output Delimited Type.	Formal Aspects Comput.	2000	DBLP DOI BibTeX RDF	Design for test conditions, Generalised stream X-machines, Output delimited type, Test completeness, Weak output distinguishable type, W-method
39	Mostafa I. H. Abd-El-Barr, Muhammad Nayyar Hasan, G. A. Hamid	On the Synthesis of MVL Functions Using Input and Output Phase Assignments.	ISMVL	1997	DBLP DOI BibTeX RDF	MVL functions synthesis, phase assignments, decomposition based mapping, input matrix, output matrix, matching-count matrix, output function number, maximum matching count, switching operations, switching operators, r-valued functions, logic synthesis, minimization, multivalued logic
37	João Navarro Jr., Reinaldo Silveira, Fábio L. Romao, Wilhelmus A. M. Van Noije	A 1.4 Gbit/s CMOS driver for 50 Ω ECL systems.	Great Lakes Symposium on VLSI	1997	DBLP DOI BibTeX RDF	CMOS driver, ECL systems, speed performance, effective length, circuit operation, current source switching, output load, SDH/SONET system, CMOS-ECL convertor output buffer, 0.8 mum, 0.7 mum, 1.4 Gbit/s, 50 ohm, CMOS logic circuits, output buffer
37	Patricia B. Powell, Paul Thompson	Natural language and voice output for relational data base systems.	ACM Annual Conference (2)	1978	DBLP DOI BibTeX RDF	Answer/reason extraction, MRPPS 3.0, Natural language output, Voice output, Question-answering system, Relational data base
36	Jérémy Barbay, Rolf Klein, Alejandro López-Ortiz, Rolf Niedermeier (eds.)	Adaptive, Output Sensitive, Online and Parameterized Algorithms, 19.04. - 24.04.2009	Adaptive, Output Sensitive, Online and Parameterized Algorithms	2009	DBLP BibTeX RDF
36	Spyros Angelopoulos 0001	Parameterized Analysis of Online Steiner Tree Problems.	Adaptive, Output Sensitive, Online and Parameterized Algorithms	2009	DBLP BibTeX RDF
36	Steven H. Vanderleest, Ravishankar K. Iyer	Heterogeneous I/O Contention in a Single-Bus Multiprocessor.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Rajesh Bordawekar, Alok N. Choudhary	Issues in Compiling I/O Intensive Problems.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Peter F. Corbett, Dror G. Feitelson, Sam Fineberg, Yarsun Hsu, Bill Nitzberg, Jean-Pierre Prost, Marc Snir, Bernard Traversat, Parkson Wong	Overview of the MPI-IO Parallel I/O Interface.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	J. Bartlett Sinclair, J. Tang, Peter J. Varman	Placement-Related Problems in Shared Disk I/O.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Gerhard A. Schloss, Michael Vernick	HCSA: A Hybrid Client-Server Architecture.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Sandra Johnson Baylor, C. Eric Wu	Parallel I/O Workload Characteristics Using Vesta.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Elizabeth Shriver, Mark H. Nodine	An Introduction to Parallel I/O Models and Algorithms.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Steven A. Moyer, Vaidy S. Sunderam	Scalable Concurrency Control for Parallel File Systems.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Rajeev Thakur, Alok N. Choudhary	Runtime Support for Out-of-Core Parallel Programs.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Ravi Jain, John Werth, James C. Browne	I/O in Parallel and Distributed Systems: An Introduction.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Abhaya Asthana, Mark Cravatts, Paul Krzyzanowski	An Experimental Active-Memory-Based I/O Subsystem.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Haruo Yokota, Yasuyuki Mimatsu	A Scalable Disk System with Data Reconstruction Functions.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	David Kotz	Introduction to Multiprocessor I/O Architecture.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Dannie Durand, Ravi Jain, David Tseytlin	Improving the Performance of Parallel I/O Using Distributed Scheduling Algorithms.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Sandra Johnson Baylor, Caroline Benveniste, Yarsun Hsu	Performance Evaluation of a Massively Parallel I/O Subsystem.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Edgar T. Kalns, Yarsun Hsu	Video on Demand Using the Vesta Parallel File System.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Nils Nieuwejaar, David Kotz	Low-Level Interfaces for High-Level Parallel I/O.	Input/Output in Parallel and Distributed Computer Systems	1996	DBLP DOI BibTeX RDF
36	Vincent J. DiGri, Jane E. King	The Share 709 System: Input-Output Translation.	J. ACM	1959	DBLP DOI BibTeX RDF
35	Tengda Sun, Jinfeng Wang 0001	A Simple Model for Assessing Output Uncertainty in Stochastic Simulation Systems.	MICAI	2007	DBLP DOI BibTeX RDF	Simulation Output, Uncertainty Assessment, Stochastic Simulation System, Bayesian Melding
35	Keun-Bae Kim, Hyup Jong Kim	Back-Pressure Buffering Scheme to Improve the Cell Loss Property on the Output Buffered ATM Switch.	LCN	1996	DBLP DOI BibTeX RDF	back-pressure buffering, cell loss property, output buffered ATM switch, input cells, push-out mechanism, selective pressure mechanism, small sized memory, asynchronous transfer mode, shared memory, queueing theory, simulation results, computer simulation, performance comparison, FIFO, switch fabric, output buffer
35	Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy	Masking of Unknown Output Values during Output Response Compression byUsing Comparison Units.	IEEE Trans. Computers	2004	DBLP DOI BibTeX RDF	output response compression, Built-in self-test, scan design
34	Grace Ruiz Little	Establishing a graphics standard.	SIGUCCS	1990	DBLP DOI BibTeX RDF
32	Yutaka Kataoka, Masato Morisaki, Hiroshi Kuribayashi, Hiroyoshi Ohara	A Model for Input and Output for Multilingual Text in a Windowing Environment.	ACM Trans. Inf. Syst.	1992	DBLP DOI BibTeX RDF	X window systems, multiwindow, output method, localization, linguistics, multilingual, internationalization, input/output, input method
31	Ding-Jyh Tsaur, Hsuan-Kuei Cheng, Chia-Lung Liu, Woei Lin	A Study of Matching Output Queueing with a 3D-VOQ Switch.	ICOIN	2006	DBLP DOI BibTeX RDF	output queueing emulation, 3D-VOQ, QoS, switching system
31	Bernd Wurth, Ulf Schlichtmann, Klaus Eckl, Kurt Antreich	Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs.	ACM Trans. Design Autom. Electr. Syst.	1999	DBLP DOI BibTeX RDF	FPGA technology, TOS, assignable functions, implicit BDD-based methods, mapping synthesis, multiple-output decomposition, preferable functions, subfunction sharing gain, subfunction sharing potential, variable partitioning for decomposition, Boolean functions, decomposition, computer-aided design of VLSI
30	R. Kh. Latypov	Comments on "optimizing error masking in BIST by output data modification".	J. Electron. Test.	1991	DBLP DOI BibTeX RDF	Output data compaction, output data modification, Walsh coefficients
29	Cheng-Shang Chang, Jay Cheng, Duan-Shin Lee, Chi-Feung Wu	Quasi-Output-Buffered Switches.	INFOCOM	2008	DBLP DOI BibTeX RDF
29	Kyungno Lee, Doo Yong Lee	MIMO Output Estimation With Reduced Multirate Sampling for Real-Time Haptic Rendering.	IEEE Trans. Robotics	2007	DBLP DOI BibTeX RDF
28	Byoung-Seok Park, Sung-Chun Kim	Design and Analysis of a New Fast Packet Switching Fabric Supporting Multimedia Traffic.	LCN	1996	DBLP DOI BibTeX RDF	fast packet switching fabric, ATM switch architecture, output queueing, switch analysis, FAB Banyan switching fabrics, Batcher sorter, double shuffle network, packet distributors, FAB networks, output buffer modules, compressed video data, performance evaluation, throughput, packet switching, hardware implementation, voice, multimedia traffic, packet delay, switch design, packet loss probability, text data
28	Aristotel Tentov, Aksenti L. Grnarov	Performance Analysis of ATM Switches with Multistage Packet Switching Interconnection Networks.	LCN	1996	DBLP DOI BibTeX RDF	multistage packet switching interconnection networks, mathematical method, finite buffering capacity, switching elements output, uniform traffic, buffered interconnection networks, synchronous buffered switching element, finite buffer size, performance analysis, asynchronous transfer mode, blocking, ATM switches, output buffering, traffic patterns, nonuniform traffic
28	Hui Shao, Chi-Ying Tsui, Wing-Hung Ki	A single inductor dual input dual output DC-DC converter with hybrid supplies for solar energy harvesting applications.	ISLPED	2009	DBLP DOI BibTeX RDF	PV cells, dual-input-dual-output, single inductor, energy harvesting, DC-DC converter, MPPT
28	Hagit Attiya, David Hay, Isaac Keslassy	Packet-mode emulation of output-queued switches.	SPAA	2006	DBLP DOI BibTeX RDF	CIOQ switch, output-queued, packet-mode scheduling, switch emulation, packet switching, queuing delay
28	Alexandre Petrenko, Nina Yevtushenko 0001, Jiale Huo	Testing Transition Systems with Input and Output Testers.	TestCom	2003	DBLP DOI BibTeX RDF	input/output transition system, test generation, fault model, conformance testing
28	Takahiro Hozumi, Osamu Kakusho, Yutaka Hata	The Output Permutation for the Multiple-Valued Logic Minimization with Universal Literals.	ISMVL	1999	DBLP DOI BibTeX RDF	universal literal, output permutation, current-mode CMOS circuits, logic synthesis, cost reduction
28	Weixun Yan, Horst Zimmermann	Continuous-Time Common-Mode Feedback Circuit for Applications with Large Output Swing and High Output Impedance.	DDECS	2008	DBLP DOI BibTeX RDF
28	Cheng-Shang Chang, Jay Cheng, Duan-Shin Lee, Chi-Feung Wu	Quasi-Output-Buffered Switches.	IEEE Trans. Parallel Distributed Syst.	2011	DBLP DOI BibTeX RDF	Delay performance, load-balanced switches, output-buffered switches, packet-pair switches, quasi-output-buffered switches
28	Mark H. Overmars, Micha Sharir	Output-Sensitive Hidden Surface Removal	FOCS	1989	DBLP DOI BibTeX RDF	output visibility map, horizontal triangles, combinatorial complexity, hidden surface removal, output-sensitive algorithms
26	Liang-Jin Lin, Antonio Ortega	Perceptually Based Video Rate Control Using Pre-Filtering and Predicted Rate-Distortion Characteristics.	ICIP (2)	1997	DBLP DOI BibTeX RDF	perceptually based video rate control, predicted rate-distortion characteristics, digital video coding, output data rate, output quality, MPEG Test Model 5, channel rates, video sources, block classification, rate control optimization process, MPEG decoders, H.263 encoders, MPEG-4 encoders, blockiness, rate distortion theory, pre-filtering, MPEG-1, computational overhead
26	Minsoo Ryu, Seongsoo Hong, Manas Saksena	Streamlining real-time controller design: From performance specifications to end-to-end timing constraints.	IEEE Real Time Technology and Applications Symposium	1997	DBLP DOI BibTeX RDF	real-time controller design, performance specifications, end-to-end timing constraints, control theoretic approach, schedulability constraint, control output responses, steady state error maximum overshoot, rise time, loop processing periods, input-to-output latency, heuristic optimization algorithm, embedded real-time controller, period calibration method, real-time systems, performance requirements, control performance, real-time control system, temporal requirements, settling time
26	Amr Elsaadany, Mukesh Singhal, Ming T. Liu	Performance study of buffering within switches in local area networks.	ICCCN	1995	DBLP DOI BibTeX RDF	switch performance, network transfer rates, output ports, input ports, LAN performance, multimedia, delay, throughput, local area networks, local area networks, buffering, queueing model, buffer size, performance study, output buffer, packet loss rate
26	Manish Pandey, Alok Jain, Randal E. Bryant, Derek L. Beatty, Gary York, Samir Jain	Extraction of finite state machines from transistor netlists by symbolic simulation.	ICCD	1995	DBLP DOI BibTeX RDF	finite state machine extraction, transistor netlists, clock level finite state machines, gate level representation, circuit clocking, output timing, simulation patterns, next state, output function, equivalent FSM, static storage structures, time multiplexed inputs, time multiplexed outputs, finite state machines, logic design, logic CAD, circuit analysis computing, FSMs, symbolic simulation, symbolic simulator, Ordered Binary Decision Diagrams
26	Andrej Zemva, Franc Brglez	Detectable perturbations: a paradigm for technology-specific multi-fault test generation.	VTS	1995	DBLP DOI BibTeX RDF	detectable perturbations, technology-specific multi-fault test generation, multiple bridging, open faults, single-output modules, multi-output modules, mutation faults, technology-mapped cells, fault diagnosis, logic testing, integrated circuit testing, combinational circuits, combinational circuits, automatic testing, stuck-at faults, cellular arrays, benchmark circuits, generic system
26	B. Ravi Kishore, Rubin A. Parekhji, Sandeep Pagey, Sunil D. Sherlekar, G. Venkatesh 0001	A new methodology for the design of low-cost fail safe circuits and networks.	VLSI Design	1995	DBLP DOI BibTeX RDF	low-cost fail safe circuits, safety critical electronic systems, input-output encoding problems, output encoding technique, low-cost design, systematic framework, graph theory, design methodology, encoding, combinational circuits, combinational circuits, graph embedding, graceful degradation, logic partitioning
26	Shai Fine, Yishay Mansour	Active sampling for multiple output identification.	Mach. Learn.	2007	DBLP DOI BibTeX RDF	Active sampling, Output identification, Separation dimension, Active learning, Hitting, VC dimension, Transductive learning
26	Filipe Costa Beber Vieira, César Augusto Prior, Cesar Ramos Rodrigues, Leonardo Perin, João Baptista dos Santos Martins	Current mode instrumentation amplifier with rail-to-rail input and output.	SBCCI	2007	DBLP DOI BibTeX RDF	current mode instrumentation amplifier, rail-to-rail input and output, analog integrated circuits
26	Min Chen, Gabriel A. Rincón-Mora	Single inductor, multiple input, multiple output (SIMIMO) power mixer-charger-supply system.	ISLPED	2007	DBLP DOI BibTeX RDF	hybrid fuel cell-lithium ion source, hysteretic mode dual loop control architecture, single inductor multi-input multi-output (SIMIMO) converter
26	Lin Liu 0004, Yuanyuan Yang 0001	Optimal packet scheduling in output-buffered optical switches with limited-range wavelength conversion.	ANCS	2007	DBLP DOI BibTeX RDF	WDM optical switches, minimum cost maximum flow, output-queued (OQ), packet scheduling, wavelength conversion
26	Sergio Scandizzo	Connectivity and the measurement of operational risk: an input-output approach.	Soft Comput.	2003	DBLP DOI BibTeX RDF	Input-output models, Operational risk measurement, Complexity, Connectivity
26	Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri	Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture.	VLSI Design	1995	DBLP DOI BibTeX RDF	multi-output logic module, cellular automata array, design turn-around time, field programmability, rapid circuit realization, logic blocks, AND-XOR based logic, library based technology mapping technique, MCNC benchmarks, field programmable gate arrays, VLSI, cellular automata, logic CAD, testability, technology mapping, multivalued logic circuits, FPGA architecture
26	James Jacob, Vishwani D. Agrawal	Multiple fault detection in two-level multi-output circuits.	J. Electron. Test.	1992	DBLP DOI BibTeX RDF	checkpoint faults, crosspoint faults, multi-output combinational circuits, fault modeling
26	Yervant Zorian, Vinod K. Agarwal	Optimizing error masking in BIST by output data modification.	J. Electron. Test.	1990	DBLP DOI BibTeX RDF	error masking, improving fault coverage, output data compaction, Built-in self-test
26	Shay Kutten, Toshimitsu Masuzawa	Output Stability Versus Time Till Output.	DISC	2007	DBLP DOI BibTeX RDF
26	Tsern-Huei Lee, Ying-Che Kuo	Performance Evaluation of Combined Input Output Queued Switch with Finite Input and Output Buffers.	ICOIN (1)	2002	DBLP DOI BibTeX RDF
25	Byungho Kim, Boseob Kwon, Jinchun Kim, Hyunsoo Yoon, Jung Wan Cho	Performance analysis of an ATM switch with multiple paths.	ICNP	1995	DBLP DOI BibTeX RDF
25	Youqiang Guo, Zijun Zhang, Xuezhu Pei	A Research on Instability of Small Flow in SCADA and an Optimizing Design for Control.	ICCSA (2)	2009	DBLP DOI BibTeX RDF	sub-output control, small flow, PID control, SCADA system
25	Ahmed M. El-Garhy, M. E. El-Shimy	Development of decoupling scheme for high order MIMO process based on PSO technique.	Appl. Intell.	2007	DBLP DOI BibTeX RDF	Multiple input multiple output (MIMO) process, Relative gain array (RGA), Decoupling compensation matrix, Particle swarm optimization
24	Rainer Oechsle, Kay Barzen	Checking automatically the output of concurrent threads.	ITiCSE	2007	DBLP DOI BibTeX RDF	automatic software assessment, vector timestamps, visualization, semaphores, causal relationship
24	Xiaoshen Li, Giorgio A. Ascoli	Computational simulation of the input-output relationship in hippocampal pyramidal cells.	J. Comput. Neurosci.	2006	DBLP DOI BibTeX RDF	CA1, Spiking rate, Synaptic integration, Synchrony, Compartmental models
24	Daniele Frigioni, Alberto Marchetti-Spaccamela, Umberto Nanni	Semidynamic Algorithms for Maintaining Single-Source Shortest Path Trees.	Algorithmica	1998	DBLP DOI BibTeX RDF	Single-source shortest path, Output complexity, Single-source shortest path, Output complexity, Key words, Dynamic algorithms, Dynamic algorithms, Amortized complexity, Amortized complexity
24	Alfredo Restrepo, Luis Fernando Zuluaga, Herberto Ortiz, Victor Ojeda	Analytical Properties of Teager's Filter.	ICIP (1)	1997	DBLP DOI BibTeX RDF	Teager's filter, Teager's algorithm, root signals, nullity set, constancy set, output pdf, output probability density function, images, nonlinear filters, input, contrast enhancer, white noise
24	Kazuo Kawakubo, Koji Tanaka, Hiromi Hiraishi	Formal Verification Of Self-Testing Properties Of Combinational Circuits.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF	self-testing properties, logic function manipulation, decision function, output code words, self-checking logic, mutiple-input multiple-output circuit, fault tolerance, formal verification, combinational circuits, combinational circuits, binary decision diagrams, stuck-at faults, satisfiability problem, characteristic functions, Berger code
24	Chao-Ju Hou, Ching-Chih Han, Wun-Chun Chau	Priority-based high-speed switch scheduling for ATM networks.	LCN	1995	DBLP DOI BibTeX RDF	iterated switching networks, priority-based high-speed switch scheduling, AN2 switch, parallel iterative matching algorithm, maximal input-output matching, priority lists, input/output pairs, probability analysis, switch size, high QoS requirements, simulation, scheduling, parallel algorithms, computational complexity, asynchronous transfer mode, probability, local area networks, iterative methods, time complexity, ATM networks, iterations, switches, high-performance distributed computing
24	Songnian Zhou	A Trace-Driven Simulation Study of Dynamic Load Balancing.	IEEE Trans. Software Eng.	1988	DBLP DOI BibTeX RDF	homogeneous distributed systems, job transfer, job response times, scheduling, scheduling, broadcasting, distributed databases, dynamic load balancing, trace-driven simulation, CPU, input/output, input-output programs, message exchange
24	Zhenyuan Guo, Lihong Huang	Global Output Convergence of a Class of Recurrent Delayed Neural Networks with Discontinuous Neuron Activations.	Neural Process. Lett.	2009	DBLP DOI BibTeX RDF	Recurrent delayed neural networks, Global output convergence, Discontinuous neuron activations, Time-varying inputs
24	Jianbin Qiu, Gang Feng 0001, Jie Yang 0004	Robust H∞ static output feedback control of discrete-time switched polytopic linear systems with average dwell-time.	Sci. China Ser. F Inf. Sci.	2009	DBLP DOI BibTeX RDF	static output feedback, average dwell-time, time-varying uncertainty, H ? control, linear matrix inequality, switched systems
24	Quoc Trung Tran, Chee-Yong Chan, Srinivasan Parthasarathy 0001	Query by output.	SIGMOD Conference	2009	DBLP DOI BibTeX RDF	at-least-one semantics, instance-equivalent queries, query by output
24	Wuwei Li, Yuhong Wang, Feng Li	Research on the Cause and Efficiency of Regional Scientific and Technical Output: Evidence from Six Provinces in China.	ISIP	2008	DBLP DOI BibTeX RDF	Regional scientific and technical output, Grey incidence analysis, six provinces in China
24	Andre Vilas Boas, Eduardo Ribeiro, Alfredo Olmos, Ricardo Maltione	Self-adaptable slew rate control output buffer for embedded microcontroller port applications.	SBCCI	2008	DBLP DOI BibTeX RDF	I/O pad, slew rate control, self-adaptable, microcontroller, output buffer
24	Shiming Han, Xiaobo Wu, Yang Liu	High-efficiency synchronous dual-output switched-capacitor dc-dc converter with digital state machine control.	ISLPED	2007	DBLP DOI BibTeX RDF	dual-output, gain-hopping, multiple gain pair conversion, switched-capacitor DC-DC converter, state machine
24	Deng Pan, Yuanyuan Yang 0001	FIFO-Based Multicast Scheduling Algorithm for Virtual Output Queued Packet Switches.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	virtual output queued (VOQ) switch, head of line (HOL) blocking, scheduling, Multicast, crossbar switch, multicast switch
24	Cyril Rousseau, Yacine Bellik, Frédéric Vernier	Multimodal output specification / simulation platform.	ICMI	2005	DBLP DOI BibTeX RDF	output multimodality, outputs simulation, outputs specification, human-computer interaction
24	Hiroki Arimura, Takeaki Uno	An Output-Polynomial Time Algorithm for Mining Frequent Closed Attribute Trees.	ILP	2005	DBLP DOI BibTeX RDF	frequent closed pattern mining, attribute tree, the least general generalization, description logic, semi-structured data, closure operation, tree mining, output-sensitive algorithm
24	Aijun Zhang, Zhi-Li Wu, Chun Hung Li, Kai-Tai Fang	On Hadamard-Type Output Coding in Multiclass Learning.	IDEAL	2003	DBLP DOI BibTeX RDF	Multiclass learning, support vector machines, error-correcting output codes, Hadamard matrix
24	Lorna Lines, Kate S. Hone	Older adults' evaluations of speech output.	ASSETS	2002	DBLP DOI BibTeX RDF	intelligent home systems., human-computer interaction, assistive technology, visual impairment, older adults, speech output
24	Shouhong Wang	The Neural Network Approach to Input-Output Analysis for Economic Systems.	Neural Comput. Appl.	2001	DBLP DOI BibTeX RDF	Input-Output analysis, Layered neural network, Econometrics
24	Jin Li	An output-shared buffer ATM switch.	ICCD	1996	DBLP DOI BibTeX RDF	buffer ATM switch, output-shared, lower bandwidth, asynchronous transfer mode, ATM switch, buffer utilization
24	Cristiana Bolchini, Giacomo Buonanno, Donatella Sciuto, Renato Stefanelli	A new switching-level approach to multiple-output functions synthesis.	VLSI Design	1995	DBLP DOI BibTeX RDF	switching-level, multiple-output functions synthesis, transistor level, randomly generated functions, logic CAD, timing constraints, circuit layout CAD, CMOS logic circuits, multivalued logic circuits, integrated circuit layout, minimisation of switching nets, area minimization, figures of merit
22	Hossam Osman, Moustafa M. Fahmy	On the Discriminatory Power of Adaptive Feed-Forward Layered Networks.	IEEE Trans. Pattern Anal. Mach. Intell.	1994	DBLP DOI BibTeX RDF	discriminatory power, adaptive feedforward layered networks, linear-output networks, mean-square classifiers, mean-square error minimisation, familiar discriminant criterion, final hidden layer, feature extraction criterion, target coding scheme, pattern recognition, feature extraction, pattern classification, Bayes methods, discriminant analysis, feedforward neural nets
22	Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey	An output encoding problem and a solution technique.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	1999	DBLP DOI BibTeX RDF
22	Ioannis P. Chochliouros, Avishay Mor, Konstantinos N. Voudouris, O. Amrani, George Agapiou	A Mobile Multi-hop Relay Base Station (MRBS) - Relay Station (RS) Link Level Performance of Coding/Modulation Schemes, on the Basis of the REWIND Research Program.	MOBILIGHT	2009	DBLP DOI BibTeX RDF	CTC (Convolutional Turbo Coding), IEEE 802.16j standard, MIMO (Multiple-Input, Multiple-Output) techniques, MISO (Multiple-Input, Single-Output) techniques, Mobile Multi-hop Relay (MMR) specification, MMR Base Station (MRBS), Relay Station (RS), WiMAX
22	Jorge Arellano-Cid, Horst H. von Brand	Network Programming Internals of the Dillo Web Browser.	SCCC	2000	DBLP DOI BibTeX RDF	Dillo, delay sources, signal driven input output, nonblocking main thread, overlapping waiting times, Internet, delays, programming, threads, Web browser, multi-threading, network programming, input-output programs, online front-ends
22	Guo Tao, Yuanxiang Li, Lishan Kang, SungChun Kim	CA Based Parallel Computational Models for Nonlinear Parabolic Systems.	ISPAN	1996	DBLP DOI BibTeX RDF	output queueing, Batcher sorter, radix-r double- network, packet distributor, FAB network, output buffer modules, ATM switch
22	K. Vijayan Asari, C. Eswaran	An Optimization Technique for the Design of Multiple Valued PLA's.	IEEE Trans. Computers	1994	DBLP DOI BibTeX RDF	multiple valued PLA design, output encoding, binary output, multiple function literal circuits, PLA size, encoding, minimization, programmable logic arrays, adders, adder, many-valued logics, minimisation, multiple valued logic, logic arrays, optimization technique, network synthesis
22	Cheng Hsien Tung, John P. Robinson	A Fast Algorithm for Optimum Syndrome Space Compression.	IEEE Trans. Computers	1988	DBLP DOI BibTeX RDF	optimum syndrome space compression, multiple-output combinational circuits, counting for time compression, built-in selftest, output response data compression, fast Walsh transform, logic testing, data compression, transforms, automatic testing, combinatorial circuits, Walsh functions
22	Peter J. Denning	Operating Systems: A statistical model for console behavior in multiuser computers.	Commun. ACM	1968	DBLP DOI BibTeX RDF	input-output design, statiscal models for input-output, operating system design
22	Weijie Sun 0001, Jie Huang 0001	Output regulation for a class of uncertain nonlinear systems with nonlinear exosystems and its application.	Sci. China Ser. F Inf. Sci.	2009	DBLP DOI BibTeX RDF	output regulation, adaptive control, nonlinear systems
22	Weihua Deng, Minrui Fei	Dynamic output feedback control of uncertain networked control systems.	GEC Summit	2009	DBLP DOI BibTeX RDF	dynamic output feedback, Markov process, networked control system