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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 6 occurrences of 3 keywords
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Results
Found 33 publication records. Showing 33 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
51 | Jeff Siebert, Jamie Collier, Rajeevan Amirtharajah |
Self-timed circuits for energy harvesting AC power supplies. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
AC power supplies, power-on-reset, energy harvesting, self-timed circuits, dynamic memory |
40 | Rajeevan Amirtharajah, Justin Wenck, Jamie Collier, Jeff Siebert, Bicky Zhou |
Circuits for energy harvesting sensor signal processing. |
DAC |
2006 |
DBLP DOI BibTeX RDF |
AC power supplies, power-on-reset, energy harvesting, self-timed circuits, dynamic memory |
34 | Andrei A. Antonov, Maksim S. Karpovich, Vladislav Yu. Vasilyev |
Power-On Reset Circuit in 180-nm CMOS With Brownout Detection, Stable Switching Points, Long Reset Pulse Duration, and Resilience to Switching Noise. |
IEEE Trans. Very Large Scale Integr. Syst. |
2022 |
DBLP DOI BibTeX RDF |
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34 | Huy-Binh Le, Xuan-Dien Do, Sang-Gug Lee 0001, Seung-Tak Ryu |
A Long Reset-Time Power-On Reset Circuit With Brown-Out Detection Capability. |
IEEE Trans. Circuits Syst. II Express Briefs |
2011 |
DBLP DOI BibTeX RDF |
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33 | Qadeer Ahmad Khan, G. K. Siddhartha |
A sequence independent power-on-reset circuit for multi-voltage systems. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
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32 | Sanjay Kumar Wadhwa, G. K. Siddhartha, Anand Gaurav |
Zero Steady State Current Power on Reset Circuit with Brown-Out Detector. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
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32 | Takeo Yasuda, Masaaki Yamamoto, Takafumi Nishi |
A power-on reset pulse generator for low voltage applications. |
ISCAS (4) |
2001 |
DBLP DOI BibTeX RDF |
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30 | Toru Tanzawa |
A process- and temperature-tolerant power-on reset circuit with a flexible detection level higher than the bandgap voltage. |
ISCAS |
2008 |
DBLP DOI BibTeX RDF |
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25 | Luis E. Rueda G., Nestor Cuevas, Elkim Roa |
An Ultra-Low Power Multi-Level Power-on Reset for Fine-Grained Power Management Strategies. |
LASCAS |
2019 |
DBLP DOI BibTeX RDF |
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22 | Heng You, Jia Yuan, Zenghui Yu, Shushan Qiao |
An Accurate Low-Power Power-on-Reset Circuit in 55-nm CMOS Technology. |
IEEE Trans. Circuits Syst. II Express Briefs |
2022 |
DBLP DOI BibTeX RDF |
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22 | Andres Amaya, Luis E. Rueda G., Elkim Roa |
A Multi-Level Power-on Reset for Fine-Grained Power Management. |
PATMOS |
2018 |
DBLP DOI BibTeX RDF |
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22 | Xiaodong Meng, Xing Li 0004, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki |
An Indoor Solar Energy Harvester with Ultra-Low-Power Reconfigurable Power-On-Reset-Styled Voltage Detector. |
ISCAS |
2018 |
DBLP DOI BibTeX RDF |
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22 | Abhik Das, Yuan Gao 0011, Tony Tae-Hyoung Kim |
A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems. |
IEEE Trans. Circuits Syst. I Regul. Pap. |
2017 |
DBLP DOI BibTeX RDF |
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22 | Suat U. Ay |
A Compact CMOS Power-on-Reset Pulse Generator Design with Low-Power and Wide Operation Range. |
J. Circuits Syst. Comput. |
2010 |
DBLP DOI BibTeX RDF |
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22 | Jin Zhang, Lin Jiang, Zecang Zeng |
Design of a Novel Power-on-Reset Circuit Based on Power Supply Detector. |
ScalCom-EmbeddedCom |
2009 |
DBLP DOI BibTeX RDF |
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18 | Yulian Wang, Xiaoyu Hu, Xinxin Ren, Dashan Shi, Heng You, Shushan Qiao, Yumei Zhou |
A 0.6V 1.76nW power on reset circuit with high accuracy. |
IEICE Electron. Express |
2022 |
DBLP DOI BibTeX RDF |
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18 | Jiashu Guo, Houpeng Chen, Yu Lei 0003, Xi Li 0012, Qian Wang, Chenchen Xie, Jie Miao, Yi Lv, Weili Liu, Zhitang Song |
An Ultra-Low Quiescent Current Resistor-Less Power on Reset Circuit. |
IEEE Trans. Circuits Syst. II Express Briefs |
2021 |
DBLP DOI BibTeX RDF |
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18 | Heng You, Jia Yuan, Zenghui Yu, Shushan Qiao |
A 0.5V 36nW 10-Transistor Power-on-Reset Circuit with High Accuracy. |
ISCAS |
2021 |
DBLP DOI BibTeX RDF |
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18 | Ting Sun, Qi Yu 0002, Ning Ning 0002, Kejun Wu, Zhong Zhang 0002, Jing Li 0022 |
A nano-watt power-on reset circuit with Brown-Out detection capability. |
Microelectron. J. |
2020 |
DBLP DOI BibTeX RDF |
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18 | Fabián Leonardo Cabrera, Fernando Rangel de Sousa, Héctor Pettenghi |
Introducing Asymmetry in a CMOS Latch to Obtain Inherent Power-On-Reset Behavior. |
LASCAS |
2019 |
DBLP DOI BibTeX RDF |
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18 | Chengying Chen, Liming Chen 0007, Jun Yang |
A Mixed-Signal Programmable Time-Division Power-On-Reset and Volume Control Circuit for High-Resolution Hearing-Aid SoC Application. |
J. Electr. Comput. Eng. |
2018 |
DBLP DOI BibTeX RDF |
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18 | Vivek Nautiyal, Lalit Gupta, Gaurav Singla, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade |
Self-timed Power-on Reset Circuit for Pseudo Dual/Two Port SRAM Used in Low-Voltage IoT Applications. |
VLSI-SoC (Selected Papers) |
2017 |
DBLP DOI BibTeX RDF |
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18 | Vivek Nautiyal, Gaurav Singla, Lalit Gupta, Jitendra Dasani, Sagar Dwivedi, Martin Kinkade |
Robust, self-timed power-on reset circuit for low-voltage applications. |
VLSI-SoC |
2017 |
DBLP DOI BibTeX RDF |
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18 | Amit Chhabra, Yagnesh Dineshbhai Vaderiya |
Low-Energy Power-ON-Reset Circuit for Dual Supply SRAM. |
IEEE Trans. Very Large Scale Integr. Syst. |
2016 |
DBLP DOI BibTeX RDF |
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18 | Sanjay Kumar Wadhwa, Avinash Chandra Tripathi |
Measurement of de-assertion threshold of power-on-reset circuits. |
VDAT |
2015 |
DBLP DOI BibTeX RDF |
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18 | Edward K. F. Lee |
A low voltage auto-reconfigured power-on-reset/bandgap reference circuit. |
ISCAS |
2014 |
DBLP DOI BibTeX RDF |
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18 | Gerald Hilber, Dominik Gruber, Michael Sams, Timm Ostermann |
Calibration of a flexible high precision Power-On Reset during production test. |
ITC |
2012 |
DBLP DOI BibTeX RDF |
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18 | Gerhard Rappitsch, Oliver Eisenberger, Bernd Obermeier, Andreas Ripp, Michael Pronath |
Experimental Verification of Simulation Based Yield Optimization for Power-On Reset Cells. |
CICC |
2006 |
DBLP DOI BibTeX RDF |
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18 | Kuo-Hsing Cheng, Yu-Lung Lo |
A fast-lock DLL with power-on reset circuit. |
ISCAS (4) |
2004 |
DBLP BibTeX RDF |
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18 | Takeo Yasuda, Masaaki Yamamoto |
An On-Chip Power-on Reset Circuit for Low Voltage Technology. |
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. |
2002 |
DBLP BibTeX RDF |
|
18 | Nima Maghari, Omid Shoaei |
A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
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15 | Yunlei Li, Jin Liu |
A 13.56 MHz RFID transponder front-end with merged load modulation and voltage doubler-clamping rectifier circuits. |
ISCAS (5) |
2005 |
DBLP DOI BibTeX RDF |
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13 | Kun-Yo Liu, Tim Yao |
Design of a RFID Transponder for Application on Secutiry. |
ITNG |
2007 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #33 of 33 (100 per page; Change: )
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