Search results for "prescalers"

Found 13 publication records. Showing 13 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
34	João Navarro, Maximiliam Luppe	Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization.	SBCCI	2020	DBLP DOI BibTeX RDF
34	Jing Jin 0005, Bukun Pan, Xiaoming Liu 0008, Jianjun Zhou	Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking range.	ISCAS	2014	DBLP DOI BibTeX RDF
34	Jian Shi, Taishan Mo, Chengyan Ma, Tianchun Ye 0001	A current-shaping technique for static MOS current-mode logic prescalers.	IEICE Electron. Express	2013	DBLP DOI BibTeX RDF
34	Prashant Dekate, William Redman-White, Domine Leenaerts, John R. Long	Broad-Band Odd-Number CMOS Prescalers With Quadrature/Symmetrical Outputs.	IEEE Trans. Circuits Syst. II Express Briefs	2012	DBLP DOI BibTeX RDF
34	Seon-Woo Hwang, Yongsam Moon	Divide-by-N and divide-by-N/N+1 prescalers based on a shift register and a multi-input NOR gate.	IEICE Electron. Express	2012	DBLP DOI BibTeX RDF
34	Wu-Hsin Chen, Byunghoo Jung	High-Speed Low-Power True Single-Phase Clock Dual-Modulus Prescalers.	IEEE Trans. Circuits Syst. II Express Briefs	2011	DBLP DOI BibTeX RDF
34	Ranganathan Desikachari, Mark Steeds, Jeffrey M. Huard, Un-Ku Moon	An Efficient Design Procedure for High-Speed Low-Power Dual-Modulus CMOS Prescalers.	ICECS	2007	DBLP DOI BibTeX RDF
34	Sheng-Che Tseng, Chinchun Meng, Wei-Yu Chen	True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers.	IEICE Trans. Electron.	2006	DBLP DOI BibTeX RDF
34	Herbert Knapp, Josef Böck, Martin Wurzer, Günter Ritzberger, Klaus Aufinger, Ludwig Treitinger	2-GHz/2-mW and 12-GHz/30-mW dual-modulus prescalers in silicon bipolar technology.	IEEE J. Solid State Circuits	2001	DBLP DOI BibTeX RDF
33	Mircea R. Stan	Synchronous Up/Down Counter with Clock Period Independent of Counter Size.	IEEE Symposium on Computer Arithmetic	1997	DBLP DOI BibTeX RDF	up/down counters, constant time counters, prescalers
33	Luis A. Montalvo, Alain Guyot	Svoboda-Tung division with no compensation.	VLSI Design	1995	DBLP DOI BibTeX RDF	Svoboda-Tung division, radix-b division algorithm, iteration overflow, most significant digits, radix-b algorithm, IEEE normalised divisor, pre-scaling technique, stepwise approximation, VLSI, iterative methods, digital arithmetic, VLSI implementation, prescalers, dividing circuits
30	Quan Yuan, Haigang Yang, Fang-yuan Dong, Tao Yin	"Time borrowing" technique for design of low-power high-speed multi-modulus prescaler in frequency synthesizer.	ISCAS	2008	DBLP DOI BibTeX RDF
30	Ping Wu, Kai He	A CMOS triple-band fractional-N frequency synthesizer for GSM/GPRS/EDGE applications.	ISCAS (4)	2001	DBLP DOI BibTeX RDF