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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 10 occurrences of 10 keywords
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Results
Found 11 publication records. Showing 11 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
128 | Jian Li 0061, Rajesh K. Gupta 0001 |
HDL presynthesis optimizations using a tabular model. |
IEEE Trans. Very Large Scale Integr. Syst. |
2000 |
DBLP DOI BibTeX RDF |
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115 | Jian Li 0061, Rajesh K. Gupta 0001 |
Decomposition of timed decision tables and its use in presynthesis optimizations. |
ICCAD |
1997 |
DBLP DOI BibTeX RDF |
TDT decomposition, behavioral HDL description, kernel extraction algorithm, optimized HDL description, presynthesis optimizations, system behavior model, timed decision table decomposition, benchmarks, decision tables, circuit synthesis |
59 | Seda Ogrenci Memik, Nikolaos Bellas, Somsubhra Mondal |
Presynthesis Area Estimation of Reconfigurable Streaming Accelerators. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
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59 | Thomas Lock, Michael Mendler, Matthias Mutz |
Combined Formal Post- and Presynthesis Verification in High Level Synthesis. |
FMCAD |
1998 |
DBLP DOI BibTeX RDF |
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56 | Sumit Gupta, Rajesh K. Gupta 0001, Nikil D. Dutt, Alexandru Nicolau |
Coordinated parallelizing compiler optimizations and high-level synthesis. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
dynamic CSE, parallelizing transformations, presynthesis, embedded systems, high-level synthesis, Code motions, common subexpression elimination |
36 | Harro Wimmel |
Presynthesis of bounded choice-free or fork-attribution nets. |
Inf. Comput. |
2020 |
DBLP DOI BibTeX RDF |
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36 | Jian Li 0061, Rajesh K. Gupta 0001 |
Limited Exception Modeling and Its Use in Presynthesis Optimizations. |
DAC |
1997 |
DBLP DOI BibTeX RDF |
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23 | Tao Xu 0002, Krishnendu Chakrabarty |
Integrated droplet routing and defect tolerance in the synthesis of digital microfluidic biochips. |
ACM J. Emerg. Technol. Comput. Syst. |
2008 |
DBLP DOI BibTeX RDF |
Physical design automation, microfluidics, biochips, module placement |
23 | Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias |
Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
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23 | Wei Huang 0004, Shougata Ghosh, Sivakumar Velusamy, Karthik Sankaranarayanan, Kevin Skadron, Mircea R. Stan |
HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design. |
IEEE Trans. Very Large Scale Integr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
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23 | Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas |
Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #11 of 11 (100 per page; Change: )
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