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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 244 occurrences of 166 keywords
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Results
Found 205 publication records. Showing 205 according to the selection in the facets
Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
50 | Irith Pomeranz, Sudhakar M. Reddy |
Unspecified Transition Faults: A Transition Fault Model for At-Speed Fault Simulation and Test Generation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2008 |
DBLP DOI BibTeX RDF |
|
37 | Irith Pomeranz, Sudhakar M. Reddy |
Equivalence and Dominance Relations Between Fault Pairs and Their Use in Fault Pair Collapsing for Fault Diagnosis. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
|
35 | Nageswara S. V. Rao |
On Parallel Algorithms for Single-Fault Diagnosis in Fault Propagation Graph Systems. |
IEEE Trans. Parallel Distributed Syst. |
1996 |
DBLP DOI BibTeX RDF |
fault propagation graph, operative diagnosis, CREW PRAM and hypercube, Fault diagnosis, single fault |
32 | Jan Torben Weinkopf, Klaus Harbich, Erich Barke |
Parsifal: A Generic and Configurable Fault Emulation Environment with Non-Classical Fault Models. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
32 | Shahrzad Mirkhani, Zainalabedin Navabi |
Enhancing Fault Simulation Performance by Dynamic Fault Clustering. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Roberto Rojas-Cessa, Eiji Oki, H. Jonathan Chao |
Concurrent fault detection for a multiple-plane packet switch. |
IEEE/ACM Trans. Netw. |
2003 |
DBLP DOI BibTeX RDF |
parallel planes, fault detection, packet switch, concurrent testing, single fault |
29 | Yong Chang Kim, Vishwani D. Agrawal, Kewal K. Saluja |
Combinational automatic test pattern generation for acyclic sequential circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
29 | Sukumar Ghosh, Arobinda Gupta, Ted Herman, Sriram V. Pemmaraju |
Fault-containing self-stabilizing distributed protocols. |
Distributed Comput. |
2007 |
DBLP DOI BibTeX RDF |
Distributed algorithms, Transformer, Self-stabilization, Fault-containment |
28 | Tetz C. Huang |
An efficient fault-containing self-stabilizing algorithm for the shortest path problem. |
Distributed Comput. |
2006 |
DBLP DOI BibTeX RDF |
Single-fault situation, Stabilization time, Shortest path problem, Fault-containment, Self-stabilizing algorithm |
28 | Zoltán Pap, Gyula Csopaki, Sarolta Dibuz |
On FSM-Based Fault Diagnosis. |
TestCom |
2005 |
DBLP DOI BibTeX RDF |
output fault, transfer fault, fault diagnosis, Finite state machine, fault localization |
27 | Mourad Elhadef, Béchir el Ayeb, Nageswara S. V. Rao |
Operative Diagnosis Algorithms for Single-Fault in Graph-Based Systems. |
IEA/AIE |
2000 |
DBLP DOI BibTeX RDF |
|
27 | Zhide Zeng, Jihua Chen, Hefeng Cao |
Research and Implementation of a High Speed Test Generation for Ultra Large Scale Combinational Circuits. |
Asian Test Symposium |
1999 |
DBLP DOI BibTeX RDF |
finite backtracking test pattern generation, n to 1 tightly coupled integration mode, parallel-pattern, single-fault propagation, ultra large scale combinational circuit (ULSCC |
26 | Anders Lyhne Christensen, Rehan O'Grady, Mauro Birattari, Marco Dorigo |
Fault detection in autonomous robots based on fault injection and learning. |
Auton. Robots |
2008 |
DBLP DOI BibTeX RDF |
Model-free, Learning, Mobile robots, Fault detection, Fault injection |
26 | Klaus Echtle, Irene Eusgeld |
A Genetic Algorithm for Fault-Tolerant System Design. |
LADC |
2003 |
DBLP DOI BibTeX RDF |
analysis of fault-tolerant behaviour, genetic algorithm, Fault tolerance, fault model, fitness function |
26 | Hyung Ki Lee, Dong Sam Ha |
HOPE: an efficient parallel fault simulator for synchronous sequential circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1996 |
DBLP DOI BibTeX RDF |
|
26 | Yunzhan Gong, Wanli Xu, Xiaowei Li 0001 |
An Expression's Single Fault Model and the Testing Methods. |
Asian Test Symposium |
2003 |
DBLP DOI BibTeX RDF |
|
24 | Wei-Kang Huang, Fabrizio Lombardi |
An approach for testing programmable/configurable field programmable gate arrays. |
VTS |
1996 |
DBLP DOI BibTeX RDF |
behavioral characterization, single fault detection, disjoint one-dimensional arrays, unilateral horizontal connections, common vertical input lines, array testing, logic blocks, field programmable gate arrays, field programmable gate arrays, VLSI, logic testing, integrated circuit testing, stuck-at fault, FPGA testing, functional fault, hybrid fault model |
24 | Byung S. So, Charles R. Kime |
A fault simulation method: Parallel pattern critical path tracing. |
J. Electron. Test. |
1993 |
DBLP DOI BibTeX RDF |
parallel pattern simulation, single fault propagation, fault simulation, Critical path tracing |
24 | Jwu E. Chen, Chung-Len Lee 0001, Wen-Zen Shen |
Single-fault fault-collapsing analysis in sequential logic circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1991 |
DBLP DOI BibTeX RDF |
|
23 | Irith Pomeranz, Sudhakar M. Reddy |
Generation of Broadside Transition-Fault Test Sets That Detect Four-Way Bridging Faults. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
23 | Man Fai Lau, Ying Liu, Tsong Yueh Chen, Yuen-Tak Yu |
On Detecting Double Literal Faults in Boolean Expressions. |
Ada-Europe |
2007 |
DBLP DOI BibTeX RDF |
Test case generation, Black-box testing, Fault-based testing, Boolean specification |
23 | Irith Pomeranz, Sudhakar M. Reddy |
Generation of broadside transition fault test sets that detect four-way bridging faults. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
23 | Michiko Inoue, Emil Gizdarski, Hideo Fujiwara |
A class of sequential circuits with combinational test generation complexity under single-fault assumption. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
combinational test generation complexity, internally balanced structures, combinational test generation, separable primary inputs, undetectability, fault diagnosis, logic testing, sequential circuits, sequential circuits, automatic test pattern generation, combinational circuits, test sequence, single stuck-at-faults, multiple stuck-at faults, single-fault |
23 | Xijiang Lin, Wu-Tung Cheng, Irith Pomeranz, Sudhakar M. Reddy |
SIFAR: Static Test Compaction for Synchronous Sequential Circuits Based on Single Fault Restoration. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
Test Segment, Parallel Pattern Simulator, Vector Restoration, Single Fault Restoration, Fault Coverage, Synchronous Sequential Circuits, Test Length, Static Test Compaction |
23 | Arun K. Somani, Vinod K. Agarwal, David Avis |
On the Complexity of Single Fault Set Diagnosability and Diagnosis Problems. |
IEEE Trans. Computers |
1989 |
DBLP DOI BibTeX RDF |
single fault set diagnosability, diagnosis problems, symmetric invalidation models, polynomial time-complexity algorithm, t-diagnosability, computational complexity, complexity, fault tolerant computing |
23 | Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu |
A New Method for Diagnosing Multiple Stuck-at Faults using Multiple and Single Fault Simulations. |
VTS |
1999 |
DBLP DOI BibTeX RDF |
|
22 | Hiroshi Takahashi, Kwame Osei Boateng, Yuzo Takamatsu, Nobuhiro Yanagida |
Multiple Fault Diagnosis in Logic Circuits Using EB Tester and Multiple/Single Fault Simulators. |
Asian Test Symposium |
1999 |
DBLP DOI BibTeX RDF |
single/multiple fault simulators, EB tester, fault diagnosis, combinational circuit, multiple stuck-at fault |
22 | Vishwani D. Agrawal, Srimat T. Chakradhar |
Combinational ATPG theorems for identifying untestable faults in sequential circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
22 | Man Fai Lau, Ying Liu, Yuen-Tak Yu |
Detecting Double Faults on Term and Literal in Boolean Expressions. |
QSIC |
2007 |
DBLP DOI BibTeX RDF |
|
22 | Wu-Tung Cheng, Meng-Lin Yu |
Differential Fault Simulation - a Fast Method Using Minimal Memory. |
DAC |
1989 |
DBLP DOI BibTeX RDF |
|
21 | Manan Syal, Michael S. Hsiao |
New techniques for untestable fault identification in sequential circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
19 | Yung-Chieh Lin, Feng Lu 0002, Kwang-Ting Cheng |
Multiple-Fault Diagnosis Based On Adaptive Diagnostic Test Pattern Generation. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Hin-Sing Siu, Yeh-Hao Chin, Wei-Pang Yang |
Byzantine Agreement in the Presence of Mixed Faults on Processors and Links. |
IEEE Trans. Parallel Distributed Syst. |
1998 |
DBLP DOI BibTeX RDF |
synchronization, Byzantine agreement, fault-tolerant distributed system, hybrid fault model, general network |
19 | Anurag Dasgupta, Sukumar Ghosh, Xin Xiao |
Probabilistic Fault-Containment. |
SSS |
2007 |
DBLP DOI BibTeX RDF |
|
19 | Yinlei Yu, Jian Xu, Wei-Kang Huang, Fabrizio Lombardi |
Diagnosing Single Faults for Interconnects in SRAM Based FPGAs. |
ASP-DAC |
1999 |
DBLP DOI BibTeX RDF |
FPGA, testing, fault diagnosis, fault model |
19 | Cheng Gong, Zheng Zheng 0001, Yunqian Zhang, Zhenyu Zhang 0004, Yunzhi Xue |
Factorising the Multiple Fault Localization Problem: Adapting Single-Fault Localizer to Multi-fault Programs. |
APSEC |
2012 |
DBLP DOI BibTeX RDF |
|
18 | Yung-Chieh Lin, Kwang-Ting Cheng |
Multiple-fault diagnosis based on single-fault activation and single-output observation. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
18 | Yigang He, Wenji Zhu |
Fault Diagnosis of Nonlinear Analog Circuits Using Neural Networks and Multi-Space Transformations. |
ISNN (3) |
2009 |
DBLP DOI BibTeX RDF |
Bilinear Transformation, Space Transformation, Neural Network, Fault Diagnosis, Analog Circuits |
18 | Jiang Brandon Liu, Andreas G. Veneris |
Incremental fault diagnosis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
18 | Koji Hashimoto, Tatsuhiro Tsuchiya, Tohru Kikuno |
Fault-Secure Scheduling of Arbitrary Task Graphs to Multiprocessor Systems. |
DSN |
2000 |
DBLP DOI BibTeX RDF |
fault-secure scheduling, tests, multiprocessors, task graphs, fault security |
18 | Marcello Dalpasso, Michele Favalli, Piero Olivo, Bruno Riccò |
Fault simulation of parametric bridging faults in CMOS IC's. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1993 |
DBLP DOI BibTeX RDF |
|
18 | Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel |
PROOFS: a fast, memory-efficient sequential circuit fault simulator. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1992 |
DBLP DOI BibTeX RDF |
|
17 | Gary D. Hachtel, Reily M. Jacoby, Kurt Keutzer, Christopher R. Morrison |
On properties of algebraic transformations and the synthesis of multifault-irredundant circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1992 |
DBLP DOI BibTeX RDF |
|
17 | Ji-Cherng Lin, Tetz C. Huang |
An Efficient Fault-Containing Self-Stabilizing Algorithm for Finding a Maximal Independent Set. |
IEEE Trans. Parallel Distributed Syst. |
2003 |
DBLP DOI BibTeX RDF |
Central demon, single transient fault, restrictions on guard conditions, primary variables, auxiliary secondary variables, stabilization time, contamination number, maximal independent set, fault-containment |
15 | Anurag Dasgupta, Sukumar Ghosh, Xin Xiao |
Fault-Containment in Weakly-Stabilizing Systems. |
SSS |
2009 |
DBLP DOI BibTeX RDF |
|
15 | Honghai Feng, Baoyan Liu, Liyun He, Bingru Yang, Yueli Li, Zhao Shuo |
Using Rough Set to Induce More Abstract Rules from Rule Base. |
KES (1) |
2006 |
DBLP DOI BibTeX RDF |
|
15 | Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin |
Efficient fault simulation on many-core processors. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
PPSFP, parallel fault simulation, many-core processors |
15 | Hung-Chuan Lai, Shi-Jinn Horng, Yong-Yuan Chen, Pingzhi Fan, Yi Pan 0001 |
A New Concurrent Detection of Control Flow Errors Based on DCT Technique. |
PRDC |
2007 |
DBLP DOI BibTeX RDF |
|
15 | Dhiraj K. Pradhan, Chunsheng Liu |
EBIST: a novel test generator with built-in fault detection capability. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
15 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Multiple Fault Diagnosis Using n-Detection Tests. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
15 | Kumar N. Dwarakanath, R. D. (Shawn) Blanton |
Exploiting Dominance and Equivalence using Fault Tuples. |
VTS |
2002 |
DBLP DOI BibTeX RDF |
|
15 | Irith Pomeranz, Sudhakar M. Reddy, Ruifeng Guo |
Static test compaction for synchronous sequential circuits based on vector restoration. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1999 |
DBLP DOI BibTeX RDF |
|
15 | Wolfgang Meyer 0002, Raul Camposano |
Active timing multilevel fault-simulation with switch-level accuracy. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1995 |
DBLP DOI BibTeX RDF |
|
15 | Peter C. Maxwell, Robert C. Aitken |
IDDQ testing as a component of a test suite: The need for several fault coverage metrics. |
J. Electron. Test. |
1992 |
DBLP DOI BibTeX RDF |
quality, fault coverage, scan, functional testing, Current testing, physical defects |
15 | Robert C. Aitken |
Diagnosis of leakage faults with IDDQ. |
J. Electron. Test. |
1992 |
DBLP DOI BibTeX RDF |
leakage fault model, Fault diagnosis, I DDQ testing |
15 | Wu-Tung Cheng, Janak H. Patel |
PROOFS: a super fast fault simulator for sequential circuits. |
EURO-DAC |
1990 |
DBLP DOI BibTeX RDF |
|
15 | Thomas M. Niermann, Wu-Tung Cheng, Janak H. Patel |
Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator. |
DAC |
1990 |
DBLP DOI BibTeX RDF |
|
14 | Dan Alexandrescu, Lorena Anghel, Michael Nicolaidis |
Simulating Single Event Transients in VDSM ICs for Ground Level Radiation. |
J. Electron. Test. |
2004 |
DBLP DOI BibTeX RDF |
single fault propagation, fault simulation, soft-errors, single event upsets |
14 | Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, Cheng-Liang Tsai |
Combination Of Automatic Test Pattern Generation And Built-In Intermediate Voltage Sensing For Detecting CMOS Bridging Faults. |
Asian Test Symposium |
1996 |
DBLP DOI BibTeX RDF |
CMOS bridging faults detection, ATPG system, built-in intermediate voltage sensing, BIFEST system, PODEM-like process, PPSFP-based process, logic monitoring, gate threshold ranges, Byzantine General's Command Problem, feedback bridging faults, parallel pattern single fault propagation, fault modelling, fault simulation, fault coverage, greedy algorithm, CMOS logic circuits |
14 | Jianli Sun, Eduard Cerny, Jan Gecsei |
Fault Tolerance in a Class of Sorting Networks. |
IEEE Trans. Computers |
1994 |
DBLP DOI BibTeX RDF |
comparators (circuits), single-fault tolerance, 1-fault tolerant design, balanced sorting network, 2-fault tolerant design, fault tolerance, reliability, parallel processing, fault tolerant computing, fault tolerant computing, sorting, comparators, sorting networks, multistage network |
14 | Tse-Yun Feng, Chuan-lin Wu |
Fault-Diagnosis for a Class of Multistage Interconnection Networks. |
IEEE Trans. Computers |
1981 |
DBLP DOI BibTeX RDF |
Baseline network, fault detection and location, parallel processing, fault model, multistage interconnection networks, multiple faults, single fault |
14 | Vinod K. Agarwal |
Multiple Fault Detection in Programmable Logic Arrays. |
IEEE Trans. Computers |
1980 |
DBLP DOI BibTeX RDF |
single fault coverage, Contact faults, PLA fault detection, PLA modeling, programmable logic arrays, masking, multiple fault detection |
14 | Kolar L. Kodandapani, Sharad C. Seth |
On Combinational Networks with Restricted Fan-Out. |
IEEE Trans. Computers |
1978 |
DBLP DOI BibTeX RDF |
single fault location, Characterization of fan-out-free networks, counting of fan-out-free, fan-out-free networks, localized fan outs, functional decomposition, combinational networks, multiple fault detection |
14 | Dennis A. Reynolds, Gernot Metze |
Fault Detection Capabilities of Alternating Logic. |
IEEE Trans. Computers |
1978 |
DBLP DOI BibTeX RDF |
Alternating logic, alternating systems, on-line detection, synchronous machine, stuck-at-faults, combinational network, time redundancy, single fault, totally self-checking |
14 | Aikata, Banashri Karmakar, Dhiman Saha |
DESIV: Differential Fault Analysis of SIV-Rijndael256 with a Single Fault. |
HOST |
2020 |
DBLP DOI BibTeX RDF |
|
14 | David Landsberg, Youcheng Sun, Daniel Kroening |
Optimising Spectrum Based Fault Localisation for Single Fault Programs Using Specifications. |
FASE |
2018 |
DBLP DOI BibTeX RDF |
|
14 | Alexandre Perez, Rui Abreu 0001, Marcelo d'Amorim |
Prevalence of Single-Fault Fixes and Its Impact on Fault Localization. |
ICST |
2017 |
DBLP DOI BibTeX RDF |
|
14 | Xin Xia 0001, Liang Gong, Tien-Duy B. Le, David Lo 0001, Lingxiao Jiang, Hongyu Zhang 0002 |
Diversity maximization speedup for localizing faults in single-fault and multi-fault programs. |
Autom. Softw. Eng. |
2016 |
DBLP DOI BibTeX RDF |
|
14 | Raimund Ubar, Sergei Kostin, Jaan Raik |
Synthesis of multiple fault oriented test groups from single fault test sets. |
DTIS |
2013 |
DBLP DOI BibTeX RDF |
|
14 | Xin-jie Zhao 0001, Shize Guo, Fan Zhang 0010, Tao Wang 0008, Zhijie Shi, Keke Ji |
Algebraic Differential Fault Attacks on LED using a Single Fault Injection. |
IACR Cryptol. ePrint Arch. |
2012 |
DBLP BibTeX RDF |
|
14 | Yoseop Lim, Jaeseok Park, Sungho Kang |
An accurate diagnosis of transition fault clusters based on single fault simulation. |
IEICE Electron. Express |
2012 |
DBLP DOI BibTeX RDF |
|
14 | Ruilin Li, Bing Sun 0001, Chao Li 0002, Jianxiong You |
Differential Fault Analysis on SMS4 using a single fault. |
Inf. Process. Lett. |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Michael Tunstall, Debdeep Mukhopadhyay, Subidh Ali |
Differential Fault Analysis of the Advanced Encryption Standard Using a Single Fault. |
WISTP |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Subidh Ali, Debdeep Mukhopadhyay |
A Differential Fault Analysis on AES Key Schedule Using Single Fault. |
FDTC |
2011 |
DBLP DOI BibTeX RDF |
|
14 | Ruilin Li, Bing Sun 0001, Chao Li 0002, Jianxiong You |
Differential Fault Analysis on SMS4 Using a Single Fault. |
IACR Cryptol. ePrint Arch. |
2010 |
DBLP BibTeX RDF |
|
14 | Subidh Ali, Debdeep Mukhopadhyay |
Acceleration of Differential Fault Analysis of the Advanced Encryption Standard Using Single Fault. |
IACR Cryptol. ePrint Arch. |
2010 |
DBLP BibTeX RDF |
|
14 | Michael Tunstall, Debdeep Mukhopadhyay |
Differential Fault Analysis of the Advanced Encryption Standard using a Single Fault. |
IACR Cryptol. ePrint Arch. |
2009 |
DBLP BibTeX RDF |
|
14 | K. Lai, Parag K. Lala |
Multiple Fault Detection in Fan-Out Free Circuits Using Minimal Single Fault Test Set. |
IEEE Trans. Computers |
1996 |
DBLP DOI BibTeX RDF |
fan-out-free circuit, output count, test generation, Multiple faults |
14 | Jens Güthoff, Volkmar Sieh |
Combining Software-Implemented and Simulation-Based Fault Injection into a Single Fault Injection Method. |
FTCS |
1995 |
DBLP DOI BibTeX RDF |
|
14 | Wen-Ben Jone, Patrick H. Madden |
Multiple fault testing using minimal single fault test set for fanout-free circuits. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1993 |
DBLP DOI BibTeX RDF |
|
14 | Tah-Yuan Kuo, Jhing-Fa Wang, Jau-Yien Lee |
Enhancing the multiple-fault detection of single-fault test sets. |
Comput. Aided Des. |
1992 |
DBLP DOI BibTeX RDF |
|
14 | Hyung Ki Lee, Dong Sam Ha |
An Efficient, Forward Fault Simulation Algorithm Based on the Parallel Pattern Single Fault Propagation. |
ITC |
1991 |
DBLP DOI BibTeX RDF |
|
14 | Ken Kubiak, W. Kent Fuchs |
Multiple-Fault Simulation and Coverage of Deterministic Single-Fault Test Sets. |
ITC |
1991 |
DBLP DOI BibTeX RDF |
|
14 | Jwu E. Chen, Chung-Len Lee 0001, Wen-Zen Shen |
Single-fault fault collapsing analysis in sequential logic circuits. |
ITC |
1990 |
DBLP DOI BibTeX RDF |
|
14 | Joseph L. A. Hughes |
Multiple fault detection using single fault test sets. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
1988 |
DBLP DOI BibTeX RDF |
|
14 | John A. Waicukauski, Eric Lindbloom, Vijay S. Iyengar, Barry K. Rosen |
Transition Fault Simulation by Parallel Pattern Single Fault Propagation. |
ITC |
1986 |
DBLP BibTeX RDF |
|
14 | Vinod K. Agarwal, Andy S. F. Fung |
Multiple Fault Testing of Large Circuits by Single Fault Test Sets. |
IEEE Trans. Computers |
1981 |
DBLP DOI BibTeX RDF |
|
14 | Ingebjørg Theiss, Olav Lysne |
FRoots: A Fault Tolerant and Topology-Flexible Routing Technique. |
IEEE Trans. Parallel Distributed Syst. |
2006 |
DBLP DOI BibTeX RDF |
path redundancy, interconnection networks, Fault-tolerant routing, deadlock freedom |
14 | Kalpesh Kapoor |
Formal Analysis of Coupling Hypothesis for Logical Faults. |
Innov. Syst. Softw. Eng. |
2006 |
DBLP DOI BibTeX RDF |
Logical fault, Software testing, Mutation testing, Fault-based testing, Boolean specification |
14 | Jason Waddle, David A. Wagner 0001 |
Fault Attacks on Dual-Rail Encoded Systems. |
ACSAC |
2005 |
DBLP DOI BibTeX RDF |
|
14 | Sabine M. Böhm, Klaus Echtle |
State Space Reduction in SDL Models of Fault-Tolerant Systems. |
IPDPS |
2004 |
DBLP DOI BibTeX RDF |
|
14 | Jayabrata Ghosh-Dastidar, Nur A. Touba |
A Systematic Approach for Diagnosing Multiple Delay Faults. |
DFT |
1998 |
DBLP DOI BibTeX RDF |
|
14 | Li-C. Wang, M. Ray Mercer, Sophia W. Kao, Thomas W. Williams |
On the decline of testing efficiency as fault coverage approaches 100%. |
VTS |
1995 |
DBLP DOI BibTeX RDF |
single stuck-at fault model, ISCAS benchmark circuits, nontarget defects, fault diagnosis, logic testing, integrated circuit testing, automatic testing, fault coverage, test pattern generation, manufacturing process, test quality, production testing, testing efficiency, circuit sizes |
14 | Antoine Nonclercq, Laurent Lonys, Anne Vanhoestenberghe, Andreas Demosthenous, Nick Donaldson |
Safety of multi-channel stimulation implants: a single blocking capacitor per channel is not sufficient after single-fault failure. |
Medical Biol. Eng. Comput. |
2012 |
DBLP DOI BibTeX RDF |
|
12 | Jan Schat |
Calculating the fault coverage for dual neighboring faults using single stuck-at fault patterns. |
DDECS |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Iwan Tabakow |
Using Place and Transition Fault Net Models for Sequential Diagnosis Time Assessment in Discrete Event Systems. |
IEA/AIE |
2008 |
DBLP DOI BibTeX RDF |
|
12 | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
Analysis and methodology for multiple-fault diagnosis. |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Hayssam El-Razouk, Zine Abid |
A New Transistor-Redundant Voter for Defect-Tolerant Digital Circuits. |
CCECE |
2006 |
DBLP DOI BibTeX RDF |
|
12 | Sining Liu, Brian King, Wei Wang 0003 |
A CRT-RSA Algorithm Secure against Hardware Fault Attacks. |
DASC |
2006 |
DBLP DOI BibTeX RDF |
algorithm, smart card, RSA, Chinese Remainder Theorem |
12 | Vishwani D. Agrawal, Alok S. Doshi |
Concurrent Test Generation. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
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