Search results for "ssta"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
151	Ashish Dobhal, Vishal Khandelwal, Ankur Srivastava 0001	Efficient and Accurate Statistical Timing Analysis for Non-Linear Non-Gaussian Variability With Incremental Attributes.	VLSI Design	2007	DBLP DOI BibTeX RDF
121	Zhuo Feng, Peng Li 0001, Yaping Zhan	An On-the-Fly Parameter Dimension Reduction Approach to Fast Second-Order Statistical Static Timing Analysis.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
121	Zhuo Feng, Peng Li 0001, Yaping Zhan	Fast Second-Order Statistical Static Timing Analysis Using Parameter Dimension Reduction.	DAC	2007	DBLP DOI BibTeX RDF
98	Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu 0006, Kirill Minkovich, Bo Yuan, Yi Zou	Accelerating Monte Carlo based SSTA using FPGA.	FPGA	2010	DBLP DOI BibTeX RDF	FPGA, monte carlo, SSTA
84	Gregory Lucas, Chen Dong 0003, Deming Chen	Variation-aware placement for FPGAs with multi-cycle statistical timing analysis.	FPGA	2010	DBLP DOI BibTeX RDF	multi-cycle, variation-aware, fpga, placement, ssta, statistical static timing analysis
84	Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim	Statistical static timing analysis considering leakage variability in power gated designs.	ISLPED	2009	DBLP DOI BibTeX RDF	process variations, leakage, power gating, ssta
83	Ratnakar Goyal, Harindranath Parameswaran, Sachin Shrivastava	Computation of Waveform Sensitivity Using Geometric Transforms for SSTA.	ISQED	2008	DBLP DOI BibTeX RDF	Timing Library, Accuracy, SSTA
75	Brian Cline, Kaviraj Chopra, David T. Blaauw, Yu Cao	Analysis and modeling of CD variation for statistical static timing.	ICCAD	2006	DBLP DOI BibTeX RDF
75	Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir	Refined statistical static timing analysis through.	DAC	2006	DBLP DOI BibTeX RDF	delay correlations, Bayesian learning, statistical timing
74	Brian Cline, Kaviraj Chopra, David T. Blaauw, Andres Torres, Savithri Sundareswaran	Transistor-Specific Delay Modeling for SSTA.	DATE	2008	DBLP DOI BibTeX RDF
69	Patrick McGuinness	Variations, margins, and statistics.	ISPD	2008	DBLP DOI BibTeX RDF	design margins, process variations, yield, SSTA
69	Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail	Statistical static timing analysis: how simple can we get?	DAC	2005	DBLP DOI BibTeX RDF	statistical static timing analysis (SSTA), process variations
60	HaNeul Chon, Taewhan Kim	Timing variation-aware task scheduling and binding for MPSoC.	ASP-DAC	2009	DBLP DOI BibTeX RDF
60	Kanupriya Gulati, Sunil P. Khatri	Accelerating statistical static timing analysis using graphics processing units.	ASP-DAC	2009	DBLP DOI BibTeX RDF
60	Lerong Cheng, Jinjun Xiong, Lei He 0001	Non-Gaussian statistical timing analysis using second-order polynomial fitting.	ASP-DAC	2008	DBLP DOI BibTeX RDF
60	Amith Singhee, Sonia Singhal, Rob A. Rutenbar	Practical, fast Monte Carlo statistical static timing analysis: why and how.	ICCAD	2008	DBLP DOI BibTeX RDF
60	Vineeth Veetil, Dennis Sylvester, David T. Blaauw	Efficient Monte Carlo based incremental statistical timing analysis.	DAC	2008	DBLP DOI BibTeX RDF	Monte Carlo, variance reduction, statistical timing
60	A. Nardi, Emre Tuncer, Srinath R. Naidu, A. Antonau, S. Gradinaru, Tao Lin, J. Song	Use of statistical timing analysis on real designs.	DATE	2007	DBLP DOI BibTeX RDF
60	Ayhan A. Mutlu, Kelvin J. Le, Mustafa Celik, Dar-sun Tsien, Garry Shyu, Long-Ching Yeh	An Exploratory Study on Statistical Timing Analysis and Parametric Yield Optimization.	ISQED	2007	DBLP DOI BibTeX RDF
59	Vineeth Veetil, Yung-Hsu Chang, Dennis Sylvester, David T. Blaauw	Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilization.	DAC	2010	DBLP DOI BibTeX RDF	graphics processing units, Monte Carlo, statistical timing
59	Walter Schneider 0001, Manuel Schmidt, Bing Li 0005, Ulf Schlichtmann	A New Bounding Technique for Handling Arbitrary Correlations in Path-Based SSTA.	PATMOS	2008	DBLP DOI BibTeX RDF
59	Lizheng Zhang, Jun Shao, Charlie Chung-Ping Chen	Non-gaussian statistical parameter modeling for SSTA with confidence interval analysis.	ISPD	2006	DBLP DOI BibTeX RDF
59	Koichi Ogawa, Jin Ohta	Accurate image reconstruction with the source space tree algorithm (SSTA) for Compton CT.	ICIP (1)	2001	DBLP DOI BibTeX RDF
54	Safar Hatami, Hamed Abrishami, Massoud Pedram	Statistical timing analysis of flip-flops considering codependent setup and hold times.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	codependency, hold time, piecewise linear, statistical static timing analysis (SSTA), probability, process variations, setup time
53	Masanori Imai, Takashi Sato, Noriaki Nakayama, Kazuya Masu	Non-parametric statistical static timing analysis: an SSTA framework for arbitrary distribution.	DAC	2008	DBLP DOI BibTeX RDF	Monte Carlo simulation, STA, order statistics, SSTA, non parametrics
45	Lerong Cheng, Jinjun Xiong, Lei He 0001	Non-Gaussian Statistical Timing Analysis Using Second-Order Polynomial Fitting.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2009	DBLP DOI BibTeX RDF
45	Chun-Yu Chuang, Wai-Kei Mak	Accurate closed-form parameterized block-based statistical timing analysis applying skew-normal distribution.	ISQED	2009	DBLP DOI BibTeX RDF
45	Takayuki Fukuoka, Akira Tsuchiya, Hidetoshi Onodera	Statistical gate delay model for Multiple Input Switching.	ASP-DAC	2008	DBLP DOI BibTeX RDF
45	Javid Jaffari, Mohab Anis	On efficient Monte Carlo-based statistical static timing analysis of digital circuits.	ICCAD	2008	DBLP DOI BibTeX RDF
45	Lin Xie, Azadeh Davoodi, Jun Zhang, Tai-Hsuan Wu	Adjustment-based modeling for statistical static timing analysis with high dimension of variability.	ICCAD	2008	DBLP DOI BibTeX RDF
45	Noel Menezes	The good, the bad, and the statistical.	ISPD	2007	DBLP DOI BibTeX RDF
45	Cristiano Forzan, Davide Pandini	Why we need statistical static timing analysis.	ICCD	2007	DBLP DOI BibTeX RDF
45	Ratnakar Goyal, Sachin Shrivastava, Harindranath Parameswaran, Parveen Khurana	Improved First-Order Parameterized Statistical Timing Analysis for Handling Slew and Capacitance Variation.	VLSI Design	2007	DBLP DOI BibTeX RDF
45	Kaviraj Chopra, Bo Zhai, David T. Blaauw, Dennis Sylvester	A new statistical max operation for propagating skewness in statistical timing analysis.	ICCAD	2006	DBLP DOI BibTeX RDF
39	Jui-Hsiang Liu, Jun-Kuei Zeng, Ai-Syuan Hong, Lumdo Chen, Charlie Chung-Ping Chen	Process-Variation Statistical Modeling for VLSI Timing Analysis.	ISQED	2008	DBLP DOI BibTeX RDF	non-Gaussian model, VLSI, Process Variation, SSTA
39	Ravikishore Gandikota, David T. Blaauw, Dennis Sylvester	Modeling crosstalk in statistical static timing analysis.	DAC	2008	DBLP DOI BibTeX RDF	delay noise, crosstalk, SSTA
30	Jia Wang 0003, Hai Zhou 0001	Risk aversion min-period retiming under process variations.	ASP-DAC	2009	DBLP DOI BibTeX RDF
30	Nikolay Rubanov	An information theoretic framework to compute the MAX/MIN operations in parameterized statistical timing analysis.	ISQED	2009	DBLP DOI BibTeX RDF
30	N. Pete Sedcole, Peter Y. K. Cheung	Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations.	ACM Trans. Reconfigurable Technol. Syst.	2008	DBLP DOI BibTeX RDF	statistical theory, within-die variability, modeling, FPGA, Delay, reconfiguration, process variation, yield
30	Yan Lin 0001, Lei He 0001, Mike Hutton	Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
30	Ruiming Chen, Hai Zhou 0001	Fast Estimation of Timing Yield Bounds for Process Variations.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
30	Khaled R. Heloue, Farid N. Najm	Early Analysis and Budgeting of Margins and Corners Using Two-Sided Analytical Yield Models.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
30	Jaskirat Singh, Sachin S. Sapatnekar	A Scalable Statistical Static Timing Analyzer Incorporating Correlated Non-Gaussian and Gaussian Parameter Variations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
30	David T. Blaauw, Kaviraj Chopra, Ashish Srivastava, Louis Scheffer	Statistical Timing Analysis: From Basic Principles to State of the Art.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
30	Guo Yu, Wei Dong 0002, Zhuo Feng, Peng Li 0001	Statistical Static Timing Analysis Considering Process Variation Model Uncertainty.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
30	Sean X. Shi, Anand Ramalingam, Daifeng Wang, David Z. Pan	Latch Modeling for Statistical Timing Analysis.	DATE	2008	DBLP DOI BibTeX RDF
30	Yi Wang, Xuan Zeng 0001, Jun Tao 0001, Hengliang Zhu, Xu Luo, Changhao Yan, Wei Cai 0003	Adaptive Stochastic Collocation Method (ASCM) for Parameterized Statistical Timing Analysis with Quadratic Delay Model.	ISQED	2008	DBLP DOI BibTeX RDF	adaptive stochastic collocation method, max, process variations, statistical static timing analysis
30	Anand Rajaram, Raguram Damodaran, Arjun Rajagopal	Practical Clock Tree Robustness Signoff Metrics.	ISQED	2008	DBLP DOI BibTeX RDF
30	Khaled R. Heloue, Farid N. Najm	Parameterized timing analysis with general delay models and arbitrary variation sources.	DAC	2008	DBLP DOI BibTeX RDF	nonlinear delay, parameterized timing analysis, variability
30	Yan Lin 0001, Lei He 0001	Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation.	FPGA	2007	DBLP DOI BibTeX RDF	FPGA, uncertainty, process variation, stochastic, physical synthesis
30	N. Pete Sedcole, Peter Y. K. Cheung	Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis.	FPGA	2007	DBLP DOI BibTeX RDF	statistical theory, within-die variability, modelling, FPGA, delay, reconfiguration, process variation, yield
30	Lerong Cheng, Jinjun Xiong, Lei He 0001	Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources.	DAC	2007	DBLP DOI BibTeX RDF
30	Lizheng Zhang, Weijen Chen, Yuhen Hu, Charlie Chung-Ping Chen	Statistical static timing analysis with conditional linear MAX/MIN approximation and extended canonical timing model.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2006	DBLP DOI BibTeX RDF
30	Sarvesh Bhardwaj, Praveen Ghanta, Sarma B. K. Vrudhula	A framework for statistical timing analysis using non-linear delay and slew models.	ICCAD	2006	DBLP DOI BibTeX RDF
30	Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan	An accurate sparse matrix based framework for statistical static timing analysis.	ICCAD	2006	DBLP DOI BibTeX RDF
30	Aseem Agarwal, Kaviraj Chopra, David T. Blaauw	Statistical Timing Based Optimization using Gate Sizing.	DATE	2005	DBLP DOI BibTeX RDF
30	Hansjoerg von Brevern, Kateryna Synytsya	Systemic-Structural Theory of Activity: A Model for Holistic Learning Technology Systems.	ICALT	2005	DBLP DOI BibTeX RDF
29	Renyang Liu, Wei Zhou 0011, Sixin Wu, Jun Zhao 0007, Kwok-Yan Lam	SSTA: Salient Spatially Transformed Attack.	CoRR	2023	DBLP DOI BibTeX RDF
29	Yihan Li, Wenwen Zhang, Zhao Pei	SSTA-Net: Self-supervised Spatio-Temporal Attention Network for Action Recognition.	ICIG (2)	2023	DBLP DOI BibTeX RDF
29	Xiaoyin Liu, Ning Li, Jun Guo, Zhongyong Fan, Xiaoping Lu, Weifeng Liu 0001, Baodi Liu	Multistep-Ahead Prediction of Ocean SSTA Based on Hybrid Empirical Mode Decomposition and Gated Recurrent Unit Model.	IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens.	2022	DBLP DOI BibTeX RDF
29	M. Amin Savari, Hadi Jahanirad	NN-SSTA: A deep neural network approach for statistical static timing analysis.	Expert Syst. Appl.	2020	DBLP DOI BibTeX RDF
29	Vinicius V. A. Camargo, Ben Kaczer, Gilson I. Wirth, Tibor Grasser, Guido Groeseneken	Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits.	IEEE Trans. Very Large Scale Integr. Syst.	2014	DBLP DOI BibTeX RDF
29	Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato	Parallel Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element.	IEICE Trans. Electron.	2013	DBLP DOI BibTeX RDF
29	Gengsheng Chen, Chenxi Qian, Jun Tao	SSTA Scheme for Multiple Input Switching Case Based on Stochastic Collocation Method.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2012	DBLP DOI BibTeX RDF
29	Jaeyong Chung, Jacob A. Abraham	Refactoring of Timing Graphs and Its Use in Capturing Topological Correlation in SSTA.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2012	DBLP DOI BibTeX RDF
29	Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme	Delay-correlation-aware SSTA based on conditional moments.	Microelectron. J.	2012	DBLP DOI BibTeX RDF
29	Keliang Zhang, Baifeng Wu	Parallel Sparse Matrix Multiplication for Preconditioning and SSTA on a Many-Core Architecture.	NAS	2012	DBLP DOI BibTeX RDF
29	Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato	A fully pipelined implementation of Monte Carlo based SSTA on FPGAs.	ISQED	2011	DBLP DOI BibTeX RDF
29	Shinyu Ninomiya, Masanori Hashimoto	Accuracy Enhancement of Grid-Based SSTA by Coefficient Interpolation.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2010	DBLP DOI BibTeX RDF
29	Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme	Interpreting SSTA Results with Correlation.	PATMOS	2009	DBLP DOI BibTeX RDF
29	Min Gong, Hai Zhou 0001, Jun Tao 0001, Xuan Zeng 0001	Binning optimization based on SSTA for transparently-latched circuits.	ICCAD	2009	DBLP DOI BibTeX RDF
29	Jaeyong Chung, Jacob A. Abraham	A hierarchy of subgraphs underlying a timing graph and its use in capturing topological correlation in SSTA.	ICCAD	2009	DBLP DOI BibTeX RDF
29	Shinyu Ninomiya, Masanori Hashimoto	Enhancement of grid-based spatially-correlated variability modeling for improving SSTA accuracy.	SoCC	2009	DBLP DOI BibTeX RDF
29	Naeun Zang, Eunsuk Park, Juho Kim	Efficient cell characterization for SSTA.	APCCAS	2008	DBLP DOI BibTeX RDF
29	Zeqin Wu, Philippe Maurine, Nadine Azémard, Gilles R. Ducharme	SSTA considering switching process induced correlations.	APCCAS	2008	DBLP DOI BibTeX RDF
29	Hiroyuki Kobayashi, Nobuto Ono, Takashi Sato, Jiro Iwai, Hidenari Nakashima, Takaaki Okumura, Masanori Hashimoto	Proposal of Metrics for SSTA Accuracy Evaluation.	IEICE Trans. Fundam. Electron. Commun. Comput. Sci.	2007	DBLP DOI BibTeX RDF
24	Chen Dong 0003, Scott Chilstedt, Deming Chen	FPCNA: a field programmable carbon nanotube array.	FPGA	2009	DBLP DOI BibTeX RDF	cnt-based lut, discretized ssta, variation aware cad, fpga, nanoelectronics
24	Lerong Cheng, Puneet Gupta 0001, Costas J. Spanos, Kun Qian 0014, Lei He 0001	Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability.	DAC	2009	DBLP DOI BibTeX RDF	leakage analysis, process variaion, timing, SSTA
24	Jui-Hsiang Liu, Ming-Feng Tsai, Lumdo Chen, Charlie Chung-Ping Chen	Accurate and analytical statistical spatial correlation modeling for VLSI DFM applications.	DAC	2008	DBLP DOI BibTeX RDF	process variation, spatial correlation, SSTA
15	Qin Tang, Amir Zjajo, Michel Berkelaar, Nick van der Meijs	RDE-based transistor-level gate simulation for statistical static timing analysis.	DAC	2010	DBLP DOI BibTeX RDF	non-Monte Carlo, transistor-level modeling, statistical static timing analysis
15	Shih-An Yu, Pei-Yu Huang, Yu-Min Lee	A multiple supply voltage based power reduction method in 3-D ICs considering process variations and thermal effects.	ASP-DAC	2009	DBLP DOI BibTeX RDF
15	Gregory Lucas, Scott Cromar, Deming Chen	FastYield: variation-aware, layout-driven simultaneous binding and module selection for performance yield optimization.	ASP-DAC	2009	DBLP DOI BibTeX RDF
15	Parimala Viswanath, Pranav Murthy, Debajit Das, R. Venkatraman, Ajoy Mandal, Arvind Veeravalli, H. Udayakumar	Optimization strategies to improve statistical timing.	ISQED	2009	DBLP DOI BibTeX RDF
15	Azadeh Davoodi, Ankur Srivastava 0001	Variability Driven Gate Sizing for Binning Yield Optimization.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
15	Bao Liu 0001	Signal Probability Based Statistical Timing Analysis.	DATE	2008	DBLP DOI BibTeX RDF
15	Jinjun Xiong, Vladimir Zolotov, Chandu Visweswariah	Incremental Criticality and Yield Gradients.	DATE	2008	DBLP DOI BibTeX RDF
15	Katsumi Homma, Izumi Nitta, Toshiyuki Shibuya	Non-Gaussian Statistical Timing models of die-to-die and within-die parameter variations for full chip analysis.	ASP-DAC	2008	DBLP DOI BibTeX RDF
15	Jun-Fu Huang, Victor C. Y. Chang, Sally Liu, Kelvin Y. Y. Doong, Keh-Jeng Chang	Modeling Sub-90nm On-Chip Variation Using Monte Carlo Method for DFM.	ASP-DAC	2007	DBLP DOI BibTeX RDF
15	Mongkol Ekpanyapong, Xin Zhao 0001, Sung Kyu Lim	An Efficient Computation of Statistically Critical Sequential Paths Under Retiming.	ASP-DAC	2007	DBLP DOI BibTeX RDF
15	Chee Sing Lee 0002, Wei Ting Loke, Wenjuan Zhang, Yajun Ha	Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools.	FPL	2007	DBLP DOI BibTeX RDF
15	Jongyoon Jung, Taewhan Kim	Timing variation-aware high-level synthesis.	ICCAD	2007	DBLP DOI BibTeX RDF
15	Bao Liu 0001	Gate Level Statistical Simulation Based on Parameterized Models for Process and Signal Variations.	ISQED	2007	DBLP DOI BibTeX RDF
15	Qunzeng Liu, Sachin S. Sapatnekar	Confidence Scalable Post-Silicon Statistical Delay Prediction under Process Variations.	DAC	2007	DBLP DOI BibTeX RDF
15	Kunhyuk Kang, Bipul C. Paul, Kaushik Roy 0001	Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters.	ACM Trans. Design Autom. Electr. Syst.	2006	DBLP DOI BibTeX RDF	Process variation, spatial correlation, statistical timing analysis
15	Markus Bühler, Jürgen Koehl, Jeanne Bickford, Jason Hibbeler, Ulf Schlichtmann, Ralf Sommer, Michael Pronath, Andreas Ripp	DFM/DFY design for manufacturability and yield - influence of process variations in digital, analog and mixed-signal circuit design.	DATE	2006	DBLP DOI BibTeX RDF
15	Usha Narasimha, Binu Abraham, N. S. Nagaraj	Statistical Analysis of Capacitance Coupling Effects on Delay and Noise.	ISQED	2006	DBLP DOI BibTeX RDF