Search results for "temperature-aware"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
87	Wei Huang 0004, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy	Compact thermal modeling for temperature-aware design.	DAC	2004	DBLP DOI BibTeX RDF	temperature-aware computing, reliability, leakage, thermal model, temperature-aware design, power-aware design
77	Daniel C. Vanderster, Amirali Baniasadi, Nikitas J. Dimopoulos	Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters.	Asia-Pacific Computer Systems Architecture Conference	2007	DBLP DOI BibTeX RDF
69	Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta 0001, Stephen P. Boyd, Giovanni De Micheli	Temperature-aware processor frequency assignment for MPSoCs using convex optimization.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	temperature-aware, MPSoCs, convex optimization, thermal
67	Yuan Xie 0001, Wei-Lun Hung	Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design.	J. VLSI Signal Process.	2006	DBLP DOI BibTeX RDF	thermal-aware design, scheduling, embedded system design, system-on-chip design
64	Jian-Jia Chen, Chia-Mei Hung, Tei-Wei Kuo	On the Minimization fo the Instantaneous Temperature for Periodic Real-Time Tasks.	IEEE Real-Time and Embedded Technology and Applications Symposium	2007	DBLP DOI BibTeX RDF	Temperature-aware scheduling, Real-time systems, Dynamic voltage scaling
63	Weiping Liao, Lei He 0001, Kevin M. Lepak	Temperature and supply Voltage aware performance and power modeling at microarchitecture level.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2005	DBLP DOI BibTeX RDF
63	Chunchen Liu, Junjie Su, Yiyu Shi 0001	Temperature-aware clock tree synthesis considering spatiotemporal hot spot correlations.	ICCD	2008	DBLP DOI BibTeX RDF
62	Zhijian Lu, Wei Huang 0004, John C. Lach, Mircea R. Stan, Kevin Skadron	Interconnect lifetime prediction under dynamic stress for reliability-aware design.	ICCAD	2004	DBLP DOI BibTeX RDF
62	Benjamin Carrión Schäfer, Taewhan Kim	Hotspots Elimination and Temperature Flattening in VLSI Circuits.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
59	Ja Chun Ku, Yehea I. Ismail	On the Scaling of Temperature-Dependent Effects.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2007	DBLP DOI BibTeX RDF
53	Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik	Peak temperature control and leakage reduction during binding in high level synthesis.	ISLPED	2005	DBLP DOI BibTeX RDF	switching, leakage, temperature, binding
53	Ali Manzak	Temperature Aware Datapath Scheduling.	PATMOS	2005	DBLP DOI BibTeX RDF
51	Ramkumar Jayaseelan, Tulika Mitra	Temperature Aware Scheduling for Embedded Processors.	VLSI Design	2009	DBLP DOI BibTeX RDF
48	Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir	LEAF: A System Level Leakage-Aware Floorplanner for SoCs.	ASP-DAC	2007	DBLP DOI BibTeX RDF	LEAF, leakage-aware floorplanning, temperature-aware leakage power, dynamic power profile, system on chip, SoC designs
48	Benjamin Carrión Schäfer, Yongho Lee, Taewhan Kim	Temperature-Aware Compilation for VLIWProcessors.	RTCSA	2007	DBLP DOI BibTeX RDF
45	Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik	Temperature-aware resource allocation and binding in high-level synthesis.	DAC	2005	DBLP DOI BibTeX RDF	switching, leakage, temperature, binding
43	Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng	On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration.	DAC	2009	DBLP DOI BibTeX RDF	voltage/frequency scaling, energy, temperature dependency
43	Giacomo Paci, Paul Marchal, Francesco Poletti, Luca Benini	Exploring "temperature-aware" design in low-power MPSoCs.	DATE	2006	DBLP DOI BibTeX RDF
42	Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan	A temperature-aware virtual submesh allocation scheme for noc-based manycore chips.	SPAA	2008	DBLP DOI BibTeX RDF	manycore chips, submesh allocation, algorithm, noc, temperature
42	Kostas Siozios, Dimitrios Soudris	A Novel Methodology for Temperature-Aware Placement and Routing of FPGAs.	ISVLSI	2007	DBLP DOI BibTeX RDF
40	Pedro Chaparro, José González 0002, Antonio González 0001	Thermal-Aware Clustered Microarchitectures.	ICCD	2004	DBLP DOI BibTeX RDF
40	Deepak Rajan, Philip S. Yu	Temperature-Aware Scheduling: When is System-Throttling Good Enough?	WAIM	2008	DBLP DOI BibTeX RDF
37	Hao Yu 0001, Yu Hu 0002, Chunchen Liu, Lei He 0001	Minimal skew clock embedding considering time variant temperature gradient.	ISPD	2007	DBLP DOI BibTeX RDF	clock tree design, compact parameterization, parameterized perturbation, thermal management
36	Lin Yuan, Sean Leventhal, Gang Qu 0001	Temperature-aware leakage minimization technique for real-time systems.	ICCAD	2006	DBLP DOI BibTeX RDF
34	Zhijian Lu, Wei Huang 0004, Mircea R. Stan, Kevin Skadron, John C. Lach	Interconnect Lifetime Prediction for Reliability-Aware Systems.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
33	Yu Wang 0002, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie 0001	Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation.	IEEE Trans. Dependable Secur. Comput.	2011	DBLP DOI BibTeX RDF	temperature-aware NBTI modeling, circuit performance degradation, Negative bias temperature instability (NBTI), leakage reduction
33	Andreas Merkel, Frank Bellosa	Task activity vectors: a new metric for temperature-aware scheduling.	EuroSys	2008	DBLP DOI BibTeX RDF	activity vectorsvectors, hotspot reduction, task characteristics, temperature-aware scheduling, thermal management, task migration
33	Yan Zhang 0028, Mircea R. Stan	Temperature-aware circuit design using adaptive body biasing.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	adaptive body biasing, temperature-aware design
33	Li Shang, Li-Shiuan Peh, Amit Kumar 0002, Niraj K. Jha	Temperature-Aware On-Chip Networks.	IEEE Micro	2006	DBLP DOI BibTeX RDF	Temperature-aware, thermal management, thermal modeling, on-chip networks, thermal, simulation framework
31	Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross	Proactive temperature balancing for low cost thermal management in MPSoCs.	ICCAD	2008	DBLP DOI BibTeX RDF
31	Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. Dick, Li Shang, Hai Zhou 0001, Xianlong Hong, Qiang Zhou 0001	3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
31	Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh, Jung Hwan Choi, Jayathi Murthy, Kaushik Roy 0001	Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology.	ASP-DAC	2006	DBLP DOI BibTeX RDF
31	Xiangrong Zhou, Chenjie Yu, Peter Petrov	Temperature-aware register reallocation for register file power-density minimization.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF
31	Ayse K. Coskun, Tajana Simunic Rosing, Keith Whisnant, Kenny C. Gross	Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
31	Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng	Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling.	DDECS	2008	DBLP DOI BibTeX RDF
31	Chunta Chu, Xinyi Zhang, Lei He 0001, Tong Jing	Temperature aware microprocessor floorplanning considering application dependent power load.	ICCAD	2007	DBLP DOI BibTeX RDF
31	Tianpei Zhang, Yong Zhan, Sachin S. Sapatnekar	Temperature-aware routing in 3D ICs.	ASP-DAC	2006	DBLP DOI BibTeX RDF
29	Min Ni, Seda Ogrenci Memik	Thermal-induced leakage power optimization by redundant resource allocation.	ICCAD	2006	DBLP DOI BibTeX RDF
29	Wei Huang 0004, Kevin Skadron, Sudhanva Gurumurthi, Robert J. Ribando, Mircea R. Stan	Differentiating the roles of IR measurement and simulation for power and temperature-aware design.	ISPASS	2009	DBLP DOI BibTeX RDF
29	Yousra Alkabani, Farinaz Koushanfar, Miodrag Potkonjak	N-version temperature-aware scheduling and binding.	ISLPED	2009	DBLP DOI BibTeX RDF	N-variants, high-level synthesis, temperature control
26	Zhenyu (Peter) Gu, Changyun Zhu, Li Shang, Robert P. Dick	Application-Specific MPSoC Reliability Optimization.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF
26	Kunal P. Ganeshpure, Ilia Polian, Sandip Kundu, Bernd Becker 0001	Reducing temperature variability by routing heat pipes.	ACM Great Lakes Symposium on VLSI	2009	DBLP DOI BibTeX RDF	reliability, physical design, thermal modeling, thermal simulation
26	Pei-Yu Huang, Chih-Kang Lin, Yu-Min Lee	Full-chip thermal analysis for the early design stage via generalized integral transforms.	ASP-DAC	2008	DBLP DOI BibTeX RDF
26	Ashutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino	Thermal resilient bounded-skew clock tree optimization methodology.	DATE	2006	DBLP DOI BibTeX RDF
26	Kyeong-Jae Lee, Kevin Skadron	Using Performance Counters for Runtime Temperature Sensing in High-Performance Processors.	IPDPS	2005	DBLP DOI BibTeX RDF
25	Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng	Temperature-Aware Voltage Selection for Energy Optimization.	DATE	2008	DBLP DOI BibTeX RDF
25	Yi-Kan Cheng, Sung-Mo Kang	A temperature-aware simulation environment for reliable ULSI chipdesign.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2000	DBLP DOI BibTeX RDF
23	Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal S. Khouri, Magdy S. Abadir	STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs.	VLSI Design	2007	DBLP DOI BibTeX RDF
23	Rajarshi Mukherjee, Seda Ogrenci Memik	An Integrated Approach to Thermal Management in High-Level Synthesis.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
23	Kevin Skadron, Mircea R. Stan, Wei Huang 0004, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan	Temperature-Aware Computer Systems: Opportunities and Challenges.	IEEE Micro	2003	DBLP DOI BibTeX RDF
22	Ayse K. Coskun, David Atienza, Mohamed M. Sabry, Jie Meng	Attaining Single-Chip, High-Performance Computing through 3D Systems with Active Cooling.	IEEE Micro	2011	DBLP DOI BibTeX RDF	active cooling, 3D liquid-cooled systems, multiprocessor systems, emerging technologies, energy-aware systems, temperature-aware design
22	Weixun Wang, Xiaoke Qin, Prabhat Mishra 0001	Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach.	ISLPED	2010	DBLP DOI BibTeX RDF	dvs, temperature-aware, model checking, low power design
22	Andrea Calimera, Enrico Macii, Massimo Poncino, R. Iris Bahar	Temperature-insensitive synthesis using multi-vt libraries.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	multi-threshold voltage, temperature-aware, logic synthesis
22	Kevin Skadron, Pradip Bose, Kanad Ghose, Resit Sendag, Joshua J. Yi, Derek Chiou	Low-Power Design and Temperature Management.	IEEE Micro	2007	DBLP DOI BibTeX RDF	low-power design, power management, hardware, energy-aware systems, temperature-aware design
22	Ja Chun Ku, Yehea I. Ismail	Thermal-aware methodology for repeater insertion in low-power VLSI circuits.	ISLPED	2007	DBLP DOI BibTeX RDF	low-power design, repeater insertion, temperature-aware design
22	Jeonghwan Choi, Chen-Yong Cher, Hubertus Franke, Hendrik F. Hamann, Alan J. Weger, Pradip Bose	Thermal-aware task scheduling at the system software level.	ISLPED	2007	DBLP DOI BibTeX RDF	low-power design, repeater insertion, temperature-aware design
22	Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki J. Murakami	The effect of temperature on cache size tuning for low energy embedded systems.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	embedded systems, cache memory, low energy, leakage current, temperature-aware design
22	Kimish Patel, Wonbok Lee, Massoud Pedram	Active bank switching for temperature control of the register file in a microprocessor.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	register file, thermal model, temperature-aware design
22	Wonbok Lee, Kimish Patel, Massoud Pedram	Dynamic thermal management for MPEG-2 decoding.	ISLPED	2006	DBLP DOI BibTeX RDF	MPEG-2 decoding, thermal model, temperature-aware design
22	Ashutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino	Dynamic thermal clock skew compensation using tunable delay buffers.	ISLPED	2006	DBLP DOI BibTeX RDF	temperature aware design methodology, tunable delay buffers, clock skew, clock tree
22	Wei Huang 0004, Eric Humenay, Kevin Skadron, Mircea R. Stan	The need for a full-chip and package thermal model for thermally optimized IC designs.	ISLPED	2005	DBLP DOI BibTeX RDF	leakage, package, thermal model, temperature-aware design
22	Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit Mehrotra, Kaustav Banerjee	Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era.	DAC	2004	DBLP DOI BibTeX RDF	electrothermal couplings, temperature aware design, subthreshold leakage, energy delay product
21	Chunchen Liu, Ruei-Xi Chen, Jichang Tan, Sharon Fan, Jeffrey Fan, Kia Makki	Thermal aware clock synthesis considering stochastic variation and correlations.	ISCAS	2008	DBLP DOI BibTeX RDF
20	Wei Huang 0004, Mircea R. Stan, Karthik Sankaranarayanan, Robert J. Ribando, Kevin Skadron	Many-core design from a thermal perspective.	DAC	2008	DBLP DOI BibTeX RDF	many-core design, thermal design power, performance, temperature
20	Jeonghwan Choi, Youngjae Kim 0001, Anand Sivasubramaniam, Jelena Srebric, Qian Wang, Joonwon Lee	Modeling and Managing Thermal Profiles of Rack-mounted Servers with ThermoStat.	HPCA	2007	DBLP DOI BibTeX RDF
20	Sung Woo Chung, Kevin Skadron	A Novel Software Solution for Localized Thermal Problems.	ISPA	2006	DBLP DOI BibTeX RDF
18	Baver Ozceylan, Boudewijn R. Haverkort, Maurits de Graaf, Marco E. T. Gerards	Minimizing the Maximum Processor Temperature by Temperature-Aware Scheduling of Real-Time Tasks.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
18	Ying Zhang 0040, Yi Ding, Zebo Peng, Huawei Li 0001, Masahiro Fujita, Jianhui Jiang	BMC-Based Temperature-Aware SBST for Worst-Case Delay Fault Testing Under High Temperature.	IEEE Trans. Very Large Scale Integr. Syst.	2022	DBLP DOI BibTeX RDF
18	João Roberto Raposo de Oliveira Martins	A Temperature-Aware Framework for Analog Design Using a gm/ID Approach. (Une méthodologie de conception des circuits analogiques consciente de la température basée sur gm/ID).		2021	RDF
18	Aniket Gupta, Kai Ni 0004, Om Prakash 0007, Xiaobo Sharon Hu, Hussam Amrouch	Temperature Dependence and Temperature-Aware Sensing in Ferroelectric FET.	IRPS	2020	DBLP DOI BibTeX RDF
18	Ngoc Le Ba, Tony Tae-Hyoung Kim	Design of Temperature-Aware Low-Voltage 8T SRAM in SOI Technology for High-Temperature Operation (25 %C-300 %C).	IEEE Trans. Very Large Scale Integr. Syst.	2017	DBLP DOI BibTeX RDF
18	Jinsoo Park 0003, Hojung Cha	T-DVS: Temperature-aware DVS based on Temperature Inversion Phenomenon.	ISLPED	2016	DBLP DOI BibTeX RDF
18	Chandra Mohan Velpula, Jayant, Vishal Shahi	CPU temperature aware scheduler a study on incorporating temperature data for CPU scheduling decisions.	ICACCI	2015	DBLP DOI BibTeX RDF
18	Tony Tae-Hyoung Kim, Ngoc Le Ba	Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C.	IEEE J. Solid State Circuits	2014	DBLP DOI BibTeX RDF
18	Khaled Baati, Michel Auguin	Temperature-aware DVFS-DPM for real-time applications under variable ambient temperature.	SIES	2013	DBLP DOI BibTeX RDF
15	Hong-Hsu Yen, Cheng-Han Lin, Hung-Wei Tsao	Time-Aware and Temperature-Aware Fire Evacuation Path Algorithm in IoT-Enabled Multi-Story Multi-Exit Buildings.	Sensors	2021	DBLP DOI BibTeX RDF
15	Kun-Chih Chen	Game-Based Thermal-Delay-Aware Adaptive Routing (GTDAR) for Temperature-Aware 3D Network-on-Chip Systems.	IEEE Trans. Parallel Distributed Syst.	2018	DBLP DOI BibTeX RDF
14	Swarup Bhunia, Kaushik Roy 0001	Low power design under parameter variations.	SoCC	2008	DBLP DOI BibTeX RDF
14	Brian Swahn, Soha Hassoun	Gate sizing: finFETs vs 32nm bulk MOSFETs.	DAC	2006	DBLP DOI BibTeX RDF	gate sizing, thermal modeling, FinFET
14	Johnsy K. John, Jie S. Hu, Sotirios G. Ziavras	Optimizing the Thermal Behavior of Subarrayed Data Caches.	ICCD	2005	DBLP DOI BibTeX RDF
11	Matteo Acquarone, Federico Miretti, Pier Giuseppe Anselma, Daniela Misul	Online Temperature-Aware Equivalent Consumption Minimization Strategy for Mild Hybrid Electric Powertrains.	IEEE Trans. Veh. Technol.	2024	DBLP DOI BibTeX RDF
11	Jasmine Mystica K, J. Martin Leo Manickam	Joint Power and Temperature Aware Routing for implant wireless body area networks.	Int. J. Commun. Syst.	2023	DBLP DOI BibTeX RDF
11	Seung Hun Choi, Seon Young Kim, Young Geun Kim, Joonho Kong, Sung Woo Chung	AMBITION: Ambient Temperature Aware VM Allocation for Edge Data Centers.	IEEE Access	2023	DBLP DOI BibTeX RDF
11	Xiang Gao	TAS: A Temperature-Aware Scheduling for Heterogeneous Computing.	IEEE Access	2023	DBLP DOI BibTeX RDF
11	Danial Javaheri, Pooia Lalbakhsh, Saeid Gorgin 0001, Jeong-A Lee, Mohammad Masdari	A new energy-efficient and temperature-aware routing protocol based on fuzzy logic for multi-WBANs.	Ad Hoc Networks	2023	DBLP DOI BibTeX RDF
11	Yanshul Sharma, Sanjay Moulik	FATS-2TC: A Fault Tolerant real-time Scheduler for energy and temperature aware heterogeneous platforms with Two types of Cores.	Microprocess. Microsystems	2023	DBLP DOI BibTeX RDF
11	Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun	TREAD-M3D: Temperature-Aware DNN Accelerators for Monolithic 3-D Mobile Systems.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Debabrata Senapati, Kousik Rajesh, Chandan Karfa, Arnab Sarkar	TMDS: Temperature-aware Makespan Minimizing DAG Scheduler for Heterogeneous Distributed Systems.	ACM Trans. Design Autom. Electr. Syst.	2023	DBLP DOI BibTeX RDF
11	Yuan Yao 0009	Game-of-Life Temperature-Aware DVFS Strategy for Tile-Based Chip Many-Core Processors.	IEEE J. Emerg. Sel. Topics Circuits Syst.	2023	DBLP DOI BibTeX RDF
11	Sobhan Niknam, Yixian Shen, Anuj Pathania, Andy D. Pimentel	3D-TTP: Efficient Transient Temperature-Aware Power Budgeting for 3D-Stacked Processor-Memory Systems.	ISVLSI	2023	DBLP DOI BibTeX RDF
11	Prachi Shukla, Derrick Aguren, Tom Burd, Ayse K. Coskun, John Kalamatianos	Temperature-Aware Sizing of Multi-Chip Module Accelerators for Multi-DNN Workloads.	DATE	2023	DBLP DOI BibTeX RDF
11	Vahidreza Moghaddas, Hammam Kattan, Tim Bücher, Mikail Yayla, Jian-Jia Chen, Hussam Amrouch	Temperature-Aware Memory Mapping and Active Cooling of Neural Processing Units.	ISLPED	2023	DBLP DOI BibTeX RDF
11	Prachi Shukla	Temperature-aware 3D-integrated systolic array DNN accelerators		2023	RDF
11	Narayanamoorthi Thilagavathi, John Prakash Arockiasamy, Sridevi Sridhar, Vaidheyanathan Rhymend Uthariaraj	TARA: temperature aware online dynamic resource allocation scheme for energyoptimization in cloud data centres.	Turkish J. Electr. Eng. Comput. Sci.	2022	DBLP DOI BibTeX RDF
11	Kun-Chih Jimmy Chen, Masoumeh Ebrahimi	Chapter Five - Routing algorithm design for power- and temperature-aware NoCs.	Adv. Comput.	2022	DBLP DOI BibTeX RDF
11	Jiseong Lee, Seung Soo Kwak, Yong Sin Kim	Temperature-Aware Adaptive Control for Automotive Front-Lighting System.	IEEE Access	2022	DBLP DOI BibTeX RDF
11	Yanshul Sharma, Shounak Chakraborty 0001, Sanjay Moulik	ETA-HP: an energy and temperature-aware real-time scheduler for heterogeneous platforms.	J. Supercomput.	2022	DBLP DOI BibTeX RDF
11	Yifan Zhuang, Ziyuan Pu, Jia Hu, Yinhai Wang	Illumination and Temperature-Aware Multispectral Networks for Edge-Computing-Enabled Pedestrian Detection.	IEEE Trans. Netw. Sci. Eng.	2022	DBLP DOI BibTeX RDF
11	Tayyab Ali Khan, Karan Singh, Manisha Manjul, Mohammad Nazir Ahmad, Azlan Mohd Zain, Ali Ahmadian	A Temperature-Aware Trusted Routing Scheme for Sensor Networks: Security Approach.	Comput. Electr. Eng.	2022	DBLP DOI BibTeX RDF
11	Mohammad M. Larijani, Mohsen Jalali	Investigation of injection-locked ring oscillators for process, voltage, and temperature-aware low phase-noise reference clock generation.	Int. J. Circuit Theory Appl.	2022	DBLP DOI BibTeX RDF