Search results for "variations"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
82	Savithri Sundareswaran, Jacob A. Abraham, Alexandre Ardelea, Rajendran Panda	Characterization of Standard Cells for Intra-Cell Mismatch Variations.	ISQED	2008	DBLP DOI BibTeX RDF	Statistical Characterization, Intra-Cell Variations, Random Variations, Mismatch Variations
78	Songqing Zhang, Vineet Wason, Kaustav Banerjee	A probabilistic framework to estimate full-chips subthreshold leakage power distribution considering within-die and die-to-die P-T-V variations.	ISLPED	2004	DBLP DOI BibTeX RDF	die-to-die variations, electrothermal couplings, subthreshold leakage power distribution, yield estimation, process variations, within-die variations
60	Guihai Yan, Xiaoyao Liang, Yinhe Han 0001, Xiaowei Li 0001	Leveraging the core-level complementary effects of PVT variations to reduce timing emergencies in multi-core processors.	ISCA	2010	DBLP DOI BibTeX RDF	complimentary effects, delay sensor, pvt variations, timing emergency, thread migration
56	Vineet Wason, Kaustav Banerjee	A probabilistic framework for power-optimal repeater insertion in global interconnects under parameter variations.	ISLPED	2005	DBLP DOI BibTeX RDF	buffer-interconnect system, statistical delay and power models, sensitivity analysis, parameter variations, statistical optimization
53	Xiaoning Qi, Alex Gyure, Yansheng Luo, Sam C. Lo, Mahmoud Shahram, Kishore Singhal	Measurement and characterization of pattern dependent process variations of interconnect resistance, capacitance and inductance in nanometer technologies.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	measurement, process variations, extraction, VLSI interconnects
51	Keith A. Bowman, James W. Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De	Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance.	ISLPED	2006	DBLP DOI BibTeX RDF	intra-die variations, multi-cycle interconnect, parameter fluctuations, time borrowing, interconnect, parameter variations, within-die variations, variation tolerant
49	Yo-Ping Huang, Jung-Shian Jau, Frode Eika Sandnes	Temporal-spatial association analysis of ocean salinity and temperature variations.	ICIS	2009	DBLP DOI BibTeX RDF	ocean temperature and salinity variations, temporal-spatial association rules, data mining, climate changes
46	Yan Pan, Joonho Kong, Serkan Ozdemir, Gokhan Memik, Sung Woo Chung	Selective wordline voltage boosting for caches to manage yield under process variations.	DAC	2009	DBLP DOI BibTeX RDF	access time failure, selective wordline voltage boosting, cache, process variations, yield
46	Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey	Considering process variations during system-level power analysis.	ISLPED	2006	DBLP DOI BibTeX RDF	system-on-chip, low power design, process variations, power analysis, power estimation
45	Sarma B. K. Vrudhula, Sarvesh Bhardwaj	Tutorial T6: Robust Design of Nanoscale Circuits in the Presence of Process Variations.	VLSI Design	2007	DBLP DOI BibTeX RDF
43	N. Verghese, P. Hurat	DFM reality in sub-nanometer IC design.	ASP-DAC	2007	DBLP DOI BibTeX RDF	EDA solutions, subnanometer IC design, catastrophic failures, systematic manufacturing variations, subnanometer manufacturing variations, DFM, design for manufacturing, parametric failures
43	Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar	Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems.	ASP-DAC	2006	DBLP DOI BibTeX RDF	Nonlinear Programming Problem (NLPP), daptive Body Bias (ABB), temperature variations, delay, process variations, leakage, enumeration
42	Egas Henes Neto, Fernanda Lima Kastensmidt, Gilson I. Wirth	A built-in current sensor for high speed soft errors detection robust to process and temperature variations.	SBCCI	2007	DBLP DOI BibTeX RDF	fault-tolerance, process variations, built-in current sensor
42	Nilanjan Banerjee, Saumya Chandra, Swaroop Ghosh, Sujit Dey, Anand Raghunathan, Kaushik Roy 0001	Coping with Variations through System-Level Design.	VLSI Design	2009	DBLP DOI BibTeX RDF
38	Yuuri Sugihara, Manabu Kotani, Kazuya Katsuki, Kazutoshi Kobayashi, Hidetoshi Onodera	A 90nm 8×16 FPGA Enhancing Speed and Yield Utilizing Within-Die Variations.	ASP-DAC	2007	DBLP DOI BibTeX RDF	LUT-based FPGA device, simple model circuit, ring oscillators, within-die variations, placement optimization, 90 nm
38	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm	Variations-aware low-power design with voltage scaling.	DAC	2005	DBLP DOI BibTeX RDF	process variations, parallel systems, low-voltage
38	Suriyaprakash Natarajan, Melvin A. Breuer, Sandeep K. Gupta 0001	Process Variations and their Impact on Circuit Operation.	DFT	1998	DBLP DOI BibTeX RDF	process parameters, electrical parameters, design corners, delay, correlations, process variations, crosstalk
38	Swarup Bhunia, Saibal Mukhopadhyay, Kaushik Roy 0001	Process Variations and Process-Tolerant Design.	VLSI Design	2007	DBLP DOI BibTeX RDF
38	N. S. Nagaraj	Dealing with interconnect process variations.	SLIP	2005	DBLP DOI BibTeX RDF
35	Serkan Ozdemir, Yan Pan, Abhishek Das, Gokhan Memik, Gabriel H. Loh, Alok N. Choudhary	Quantifying and coping with parametric variations in 3D-stacked microarchitectures.	DAC	2010	DBLP DOI BibTeX RDF	processor pipeline, process variations, 3D integration, cache architectures
35	Antonina Mitrofanova, Bud Mishra	Population genetics of human copy number variations: models and simulation of their evolution along and across the genomes.	SAC	2008	DBLP DOI BibTeX RDF	copy number variations (CNV), segmental duplications (SD) & coalescent process, population genetics
35	Patrick McGuinness	Variations, margins, and statistics.	ISPD	2008	DBLP DOI BibTeX RDF	design margins, process variations, yield, SSTA
35	Tien-Ting Fang, Ting-Chi Wang	Fast Buffered Delay Estimation Considering Process Variations.	ASP-DAC	2007	DBLP DOI BibTeX RDF	statistical buffer insertion method, buffered delay estimation, first-order canonical forms, buffer blockages, deterministic delay estimation method, process variations
35	Flavia Doboga	Different Structural Patterns Created by Short Range Variations of Internal Parameters.	International Conference on Computational Science (2)	2007	DBLP DOI BibTeX RDF	short range variations, internal parameters, patterns
35	Uday Padmanabhan, Janet Meiling Wang, Jiang Hu	Statistical clock tree routing for robustness to process variations.	ISPD	2006	DBLP DOI BibTeX RDF	routing, robustness, process variations, clock tree
35	Jia Wang 0003, Hai Zhou 0001	Minimal period retiming under process variations.	ACM Great Lakes Symposium on VLSI	2004	DBLP DOI BibTeX RDF	process variations, retiming, statistical timing analysis
35	Zaid Al-Ars, Ad J. van de Goor	Analyzing the Impact of Process Variations on DRAM Testing Using Border Resistance Traces.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF	border resistance trace, process variations, memory testing, DRAMs, defect simulation
35	Jie Wei, Ze-Nian Li	Motion compensation in color video with illumination variations.	ICIP (3)	1997	DBLP DOI BibTeX RDF	color video, illumination variations, motion vector estimation, illumination matrix, minimal mean square error, performance, image sequence, experiments, motion compensation, video compression, image colour analysis, block-matching
35	Masanori Muroyama, Tohru Ishihara, Hiroto Yasuura	Analysis of Effects of Input Arrival Time Variations on On-Chip Bus Power Consumption.	PATMOS	2008	DBLP DOI BibTeX RDF	Arrival time variation, coupling power, power estiamtion, low power coding, on-chip bus
35	Yuuri Sugihara, Yohei Kume, Kazutoshi Kobayashi, Hidetoshi Onodera	Speed and yield enhancement by track swapping on critical paths utilizing random variations for FPGAs.	FPGA	2008	DBLP DOI BibTeX RDF	FPGA, routing, variation, yield enhancement
35	Abdullah K. Alqallaf, Ahmed H. Tewfik, Scott B. Selleck, Rebecca Johnson	Framework for the analysis of genetic variations across multiple DNA copy number samples.	ICASSP	2008	DBLP DOI BibTeX RDF
33	Keith A. Bowman, James W. Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar	Circuit techniques for dynamic variation tolerance.	DAC	2009	DBLP DOI BibTeX RDF	dynamic variations, error-detection sequential, replica paths, resilient circuits, variation sensors, variation-tolerant circuits, error detection, error correction, error recovery, parameter variations, timing errors
33	John M. Gauch, Stephen M. Pizer	The Intensity Axis of Symmetry and Its Application to Image Segmentation.	IEEE Trans. Pattern Anal. Mach. Intell.	1993	DBLP DOI BibTeX RDF	spatial variations, shape structures, intensity axis, geometric coherence, computer vision, computer vision, image processing, image segmentation, image segmentation, image recognition, symmetry, shape description, intensity variations, grey-scale images
33	James H. Duncan, Tsai-Chia Chou	On the Detection of Motion and the Computation of Optical Flow.	IEEE Trans. Pattern Anal. Mach. Intell.	1992	DBLP DOI BibTeX RDF	temporal variations, temporal Gaussian smoothing function, moving edges, spatial variations, pattern recognition, pattern recognition, picture processing, image sequences, optical flow, lighting, optical information processing, zero crossings, image intensity, illumination effects
33	Lawrence B. Wolff, Terrance E. Boult	Constraining Object Features Using a Polarization Reflectance Model.	IEEE Trans. Pattern Anal. Mach. Intell.	1991	DBLP DOI BibTeX RDF	intrinsic light-dark variations, polarization reflectance model, Fresnel reflection coefficients, electrical conductivity, color variations, intensity edges, light polarisation, pattern recognition, pattern recognition, reflectivity, machine vision, optical information processing, light reflection, surface segmentation
32	Srinivasa R. S. T. G, Srivatsava Jandhyala, Narahari Tondamuthuru R	Process Variability Analysis in DSM Through Statistical Simulations and its Implications to Design Methodologies.	ISQED	2008	DBLP DOI BibTeX RDF	Design Methodologies, Random, DSM, Variations, Systematic
31	Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topaloglu	Is overlay error more important than interconnect variations in double patterning?	SLIP	2009	DBLP DOI BibTeX RDF	double patterning lithography, interconnect variations, overlay
31	Ryan Helinski, Dhruva Acharyya, Jim Plusquellic	A physical unclonable function defined using power distribution system equivalent resistance variations.	DAC	2009	DBLP DOI BibTeX RDF	unique identifier, process variations, hardware security
31	Xin Li 0001, Yu Cao 0001	Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations.	ISQED	2008	DBLP DOI BibTeX RDF	Performance modeling, process variations
31	Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson	Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors.	ISLPED	2007	DBLP DOI BibTeX RDF	FMAX distribution, parameter fluctuations, throughput distribution, multi-core, parameter variations
31	Hari Ananthan, Kaushik Roy 0001	A fully physical model for leakage distribution under process variations in Nanoscale double-gate CMOS.	DAC	2006	DBLP DOI BibTeX RDF	leakage distribution, multiple-gate, tri-gate, process variations, finFET, double-gate
31	Yu Cao, Lawrence T. Clark	Mapping statistical process variations toward circuit performance variability: an analytical modeling approach.	DAC	2005	DBLP DOI BibTeX RDF	delay, process variations, variability
31	Mitsuru Kobayashi, Shinya Masaki, Osamu Miyamoto, Youitch Nakagawa, Yoshimitsu Komiya, Takashi Matsumoto 0001	RAV (reparameterized angle variations) algorithm for online handwriting recognition.	Int. J. Document Anal. Recognit.	2001	DBLP DOI BibTeX RDF	Pen trajectory, Stroke connections, Stroke-order variations, Online handwriting recognition
31	C.-J. Richard Shi, Michael W. Tian	Simulation and sensitivity of linear analog circuits under parameter variations by Robust interval analysis.	ACM Trans. Design Autom. Electr. Syst.	1999	DBLP DOI BibTeX RDF	interval mathematics, uncertainty, process variations, sensitivity, worst-case analysis
31	Javid Jaffari, Mohab Anis	Statistical Thermal Profile Considering Process Variations: Analysis and Applications.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
31	Eric Chun, Zeshan Chishti, T. N. Vijaykumar	Shapeshifter: Dynamically changing pipeline width and speed to address process variations.	MICRO	2008	DBLP DOI BibTeX RDF
31	Saumya Chandra, Kanishka Lahiri, Anand Raghunathan, Sujit Dey	System-on-Chip Power Management Considering Leakage Power Variations.	DAC	2007	DBLP DOI BibTeX RDF
31	Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir	Reducing Pattern Delay Variations for Screening Frequency Dependent Defects.	VTS	2005	DBLP DOI BibTeX RDF
31	Min Zhao 0001, Kaushik Gala, Vladimir Zolotov, Yuhong Fu, Rajendran Panda, R. Ramkumar, Bhuwan K. Agrawal	Worst case clock skew under power supply variations.	Timing Issues in the Specification and Synthesis of Digital Systems	2002	DBLP DOI BibTeX RDF	clock skew, power supply noise, clock network
31	Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, Andrzej J. Strojwas	Impact of interconnect variations on the clock skew of a gigahertz microprocessor.	DAC	2000	DBLP DOI BibTeX RDF
29	Ameer Abdelhadi, Ran Ginosar, Avinoam Kolodny, Eby G. Friedman	Timing-driven variation-aware nonuniform clock mesh synthesis.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	clock mesh synthesis, non-tree clock networks, vlsi cad, power, process variations, physical design, clock skew, clock distribution
29	Mihir R. Choudhury, Masoud Rostami, Kartik Mohanram	Dominant critical gate identification for power and yield optimization in logic circuits.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	low-vt, process variations, yield
29	Abbas Z. Kouzani	Classification of face images using local iterated function systems.	Mach. Vis. Appl.	2008	DBLP DOI BibTeX RDF	Collage theorem, Image variations, Local iterated function systems, Recognition, Fractals, Face images
29	Shahin Nazarian, Ali Iranli, Massoud Pedram	Crosstalk analysis in nanometer technologies.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF	crosstalk-aware delay, correlation, process variations, variance, mean, statistical static timing analysis
29	Michael D. Powell, T. N. Vijaykumar	Exploiting Resonant Behavior to Reduce Inductive Noise.	ISCA	2004	DBLP DOI BibTeX RDF
28	Lin Xie, Azadeh Davoodi, Kewal K. Saluja	Post-silicon diagnosis of segments of failing speedpaths due to manufacturing variations.	DAC	2010	DBLP DOI BibTeX RDF	post-silicon diagnosis, process variations
28	Jungseob Lee, Nam Sung Kim	Optimizing total power of many-core processors considering voltage scaling limit and process variations.	ISLPED	2009	DBLP DOI BibTeX RDF	voltage and frequency scaling, process variations, parallel applications, many-core processor
28	Boban Marinkovic	Optimality conditions for discrete calculus of variations problems.	Optim. Lett.	2008	DBLP DOI BibTeX RDF	Discrete calculus of variations, 2-regularity, Mathematical programming, Optimality conditions
28	Benson S. Y. Lam, Alan Wee-Chung Liew, David K. Smith 0001, Hong Yan 0001	A Regularized Clustering Algorithm Based on Calculus of Variations.	J. Signal Process. Syst.	2008	DBLP DOI BibTeX RDF	clustering, microarray data analysis, calculus of variations
28	Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici	Reverse Vgs Static CMOS (RVGS-SCMOS); A New Technique for Dynamically Compensating the Process Variations in Sub-threshold Designs.	PATMOS	2008	DBLP DOI BibTeX RDF	Sub-VToperation, variation compensation, logic style, active-mode leakage, process variations
28	Xin Li 0001, Hongzhou Liu	Statistical regression for efficient high-dimensional modeling of analog and mixed-signal performance variations.	DAC	2008	DBLP DOI BibTeX RDF	response surface modeling, process variations, circuits
28	Praveen Ghanta, Sarma B. K. Vrudhula	Analysis of Power Supply Noise in the Presence of Process Variations.	IEEE Des. Test Comput.	2007	DBLP DOI BibTeX RDF	voltage response, verification, computer-aided design, process variations, modeling methodologies, power supply noise
28	Frank Huebbers, Ali Dasdan, Yehea I. Ismail	Computation of accurate interconnect process parameter values for performance corners under process variations.	DAC	2006	DBLP DOI BibTeX RDF	sorners, delay, interconnect, STA, variations
28	L. Richard Carley, Akshay Aggarwal, Ram K. Krishnamurthy	Decreasing low-voltage manufacturing-induced delay variations with adaptive mixed-voltage-swing circuits.	ISLPED	1998	DBLP DOI BibTeX RDF	low power CMOS logic, low voltage logic circuits, manufacturing variations, mixed-swing CMOS logic
27	Meeta Sharma Gupta, Jude A. Rivers, Pradip Bose, Gu-Yeon Wei, David M. Brooks	Tribeca: design for PVT variations with local recovery and fine-grained adaptation.	MICRO	2009	DBLP DOI BibTeX RDF
27	Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Padma Raghavan	Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors.	HiPEAC	2009	DBLP DOI BibTeX RDF
27	Jie Zhang 0007, Nishant Patil, Arash Hazeghi, Subhasish Mitra	Carbon nanotube circuits in the presence of carbon nanotube density variations.	DAC	2009	DBLP DOI BibTeX RDF	CNT correlation, CNT density variation, carbon nanotube, CNT
27	Mohamed H. Abu-Rahma, Mohab Anis	A Statistical Design-Oriented Delay Variation Model Accounting for Within-Die Variations.	IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.	2008	DBLP DOI BibTeX RDF
27	Katsumi Homma, Izumi Nitta, Toshiyuki Shibuya	Non-Gaussian Statistical Timing models of die-to-die and within-die parameter variations for full chip analysis.	ASP-DAC	2008	DBLP DOI BibTeX RDF
27	Brendan Hargreaves, Henrik Hult, Sherief Reda	Within-die process variations: How accurately can they be statistically modeled?	ASP-DAC	2008	DBLP DOI BibTeX RDF
27	Daniel Iparraguirre-Cardenas, Jose Luis Garcia-Gervacio, Víctor H. Champac	A design methodology for logic paths tolerant to local intra-die variations.	ISCAS	2008	DBLP DOI BibTeX RDF
27	Navid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm	Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
27	Simon Léonard, Martin Jägersand	On with the Visuomotor Function: A 6DOF Adaptive Approach for Modeling Image-Based Variations and Visual Servoing.	ICRA	2007	DBLP DOI BibTeX RDF
27	Jungseob Lee, Azadeh Davoodi	Comparison of Dual-Vt Configurations of SRAM Cell Considering Process-Induced Vt Variations.	ISCAS	2007	DBLP DOI BibTeX RDF
27	Sivasubramaniam Krishnamurthy, Somnath Paul, Swarup Bhunia	Adaptation to Temperature-Induced Delay Variations in Logic Circuits Using Low-Overhead Online Delay Calibration.	ISQED	2007	DBLP DOI BibTeX RDF
27	Massimo Alioto, Gaetano Palumbo	Impact of Supply Voltage Variations on Full Adder Delay: Analysis and Comparison.	IEEE Trans. Very Large Scale Integr. Syst.	2006	DBLP DOI BibTeX RDF
27	José Luis Rosselló, Carol de Benito, Sebastià A. Bota, Jaume Segura 0001	Leakage Power Characterization Considering Process Variations.	PATMOS	2006	DBLP DOI BibTeX RDF
27	Jinjun Xiong, Lei He 0001	Fast buffer insertion considering process variations.	ISPD	2006	DBLP DOI BibTeX RDF	pruning rule, dynamic programming, process variation, transitive closure, buffer insertion
27	Ke Cao, Sorin Dobre, Jiang Hu	Standard cell characterization considering lithography induced variations.	DAC	2006	DBLP DOI BibTeX RDF	process CD, CAD, OPC, design flow, standard cell, RET
27	Rui Ishiyama, Masahiko Hamanaka, Shizuo Sakamoto	An appearance model constructed on 3-D surface for robust face recognition against pose and illumination variations.	IEEE Trans. Syst. Man Cybern. Part C	2005	DBLP DOI BibTeX RDF
27	Wei Ling, Yvon Savaria	Analysis of Wave-Pipelined Domino Logic Circuit and Clocking Styles Subject to Parametric Variations.	ISQED	2005	DBLP DOI BibTeX RDF
27	S. B. Samaan	The impact of device parameter variations on the frequency and performance of VLSI chips.	ICCAD	2004	DBLP DOI BibTeX RDF
27	Xiaoming Liu 0002, Tsuhan Chen, B. V. K. Vijaya Kumar	On Modeling Variations for Face Authentication.	FGR	2002	DBLP DOI BibTeX RDF	Eigenflow, Authentication, PCA, Registration, Expression, Face
27	M. Eisele, Jörg Berthold, Doris Schmitt-Landsiedel, R. Mahnkopf	The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits.	IEEE Trans. Very Large Scale Integr. Syst.	1997	DBLP DOI BibTeX RDF
26	Nicholas A. Knouf	Variations 10b: a digital realization of cage's variations II.	ACM Multimedia	2006	DBLP DOI BibTeX RDF	John Cage, experimental music, graphical scores, performance, installation
25	Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma	Leakage reduction, delay compensation using partition-based tunable body-biasing techniques.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	low-power design, process variations, leakage current, Body biasing
25	Mahmoud Ben Naser, Csaba Andras Moritz	Power and performance tradeoffs with process variation resilient adaptive cache architectures.	SBCCI	2008	DBLP DOI BibTeX RDF	process variations, leakage power, adaptive cache
25	Toshinori Sato, Shingo Watanabe	Instruction Scheduling for Variation-Originated Variable Latencies.	ISQED	2008	DBLP DOI BibTeX RDF	variable latency adder, long latency adder, instruction criticality, microprocessors, parameter variations
25	Georges Nabaa, Navid Azizi, Farid N. Najm	An adaptive FPGA architecture with process variation compensation and reduced leakage.	DAC	2006	DBLP DOI BibTeX RDF	FPGA, process variations, leakage, body-biasing
25	Sekhar Darbha, Santosh Pande	A Robust Compile Time Method for Scheduling Task Parallelism on Distributed Memory Machines.	J. Supercomput.	1998	DBLP DOI BibTeX RDF	Cost Variations, Robustness, Scheduling Algorithms, Directed Acyclic Graph, Distributed Memory Machines, task Parallelism
25	Xiaoji Ye, Frank Liu 0001, Peng Li 0001	Fast Variational Interconnect Delay and Slew Computation Using Quadratic Models.	IEEE Trans. Very Large Scale Integr. Syst.	2007	DBLP DOI BibTeX RDF
25	Jung Hwan Choi, Jayathi Murthy, Kaushik Roy 0001	The effect of process variation on device temperature in FinFET circuits.	ICCAD	2007	DBLP DOI BibTeX RDF
25	Sani R. Nassif	Design for Variability in DSM Technologies.	ISQED	2000	DBLP DOI BibTeX RDF
24	Siddharth Garg, Diana Marculescu	On the impact of manufacturing process variations on the lifetime of sensor networks.	CODES+ISSS	2007	DBLP DOI BibTeX RDF	leakage power variability, manufacturing process variations, sensor networks, lifetime
24	Tina Yu	Program evolvability under environmental variations and neutrality.	GECCO (Companion)	2007	DBLP DOI BibTeX RDF	environmental variations, neutral networks, open-ended evolution, redundancy, self-adaptation, dynamical environment, evolvability, genotype, neutrality, phenotype, genetic drift
24	Sarvesh Bhardwaj, Sarma B. K. Vrudhula, Praveen Ghanta, Yu Cao 0001	Modeling of intra-die process variations for accurate analysis and optimization of nano-scale circuits.	DAC	2006	DBLP DOI BibTeX RDF	Karhunen-Loeve, intra-die, correlations, process variations, statistical, leakage
24	Mohamed Nekili, Yvon Savaria, Guy Bois	Design of Clock Distribution Networks in Presence of Process Variations.	Great Lakes Symposium on VLSI	1998	DBLP DOI BibTeX RDF	process variations, clock skew, clock distribution
24	Kai Shen	Request behavior variations.	ASPLOS	2010	DBLP DOI BibTeX RDF	operating system adaptation, request modeling, server system, multicore, hardware counter
24	Dimin Niu, Yiran Chen 0001, Cong Xu, Yuan Xie 0001	Impact of process variations on emerging memristor.	DAC	2010	DBLP DOI BibTeX RDF	memristor, process variation, nonvolatile memory
24	Mahmoud A. Bennaser, Yao Guo 0001, Csaba Andras Moritz	Data Memory Subsystem Resilient to Process Variations.	IEEE Trans. Very Large Scale Integr. Syst.	2008	DBLP DOI BibTeX RDF