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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 28 publication records. Showing 28 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Dimitris Syrivelis, Andrea Reale, Kostas Katrinis, Christian Pinto |
A Software-defined SoC Memory Bus Bridge Architecture for Disaggregated Computing.  |
AISTECS@HiPEAC  |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Giovanna Calò, Gaetano Bellanca, Ali Emre Kaplan, Franco Fuschini, Marina Barbiroli, Michele Bozzetti, Paolo Bassi, Vincenzo Petruzzelli |
Integrated Vivaldi antennas, an enabling technology for optical wireless networks on chip. |
AISTECS@HiPEAC |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Amir Atabaki |
Monolithic Optical Interconnects in Zero-Change CMOS. |
AISTECS@HiPEAC |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Sören Sonntag, José Manuel García Carrasco, Sébastien Rumley, Alessandro Cilardo (eds.) |
Proceedings of the 3rd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, AISTECS 2018, Manchester, United Kingdom, January 22-22, 2018 |
AISTECS@HiPEAC |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Brian Lebiednik, Sergi Abadal, Hyoukjun Kwon, Tushar Krishna |
Spoofing Prevention via RF Power Profiling in Wireless Network-on-Chip. |
AISTECS@HiPEAC |
2018 |
DBLP DOI BibTeX RDF |
|
| 1 | Kari Clark, Phill Watt |
Enabling high performance rack-scale optical switching through global synchronisation. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Sören Sonntag, José Manuel García Carrasco, José Luis Abellán Miguel, Daniel Müller-Gritschneder (eds.) |
Proceedings of the 2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, AISTECS@HiPEAC 2017, Stockholm, Sweden, January 25, 2017 |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeremiah J. Wilke |
Bringing minimal routing back to HPC through silicon photonics: a study of "flexfly" architectures with the structural simulation toolkit (SST). |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Benoît Dupont de Dinechin, Amaury Graillat |
Network-on-chip service guarantees on the kalray MPPA-256 bostan processor. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Syed Ijlal Shah |
Interconnects for next generation SoC designs. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Emmanuel Ofori-Attah, Michael Opoku Agyeman |
A survey of low power NoC design techniques. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Obaidullah, Gul N. Khan |
Optimal application mapping to 2D-mesh NoCs by using a tabu-based particle swarm methodology. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Fernando Pereñíguez-Garcia, José L. Abellán |
Secure communications in wireless network-on-chips. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Monobrata Debnath, Dimitris Konstantinou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Wei-Ming Lin, Junghee Lee |
Low-cost congestion management in networks-on-chip using edge and in-network traffic throttling. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Balboni, Davide Bertozzi |
Transparent lifetime built-in self-testing of networks-on-chip through the selective non-concurrent testing of their communication channels. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Pierre Panziera |
BXI: designing a network for eXascale. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | François Abel, Andreas Doering |
Microserver + micro-switch = micro-datacenter. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikos Pleros, Nikos Terzenidis, Theoni Alexoudi, K. Vyrsokinos, George T. Kanellos, Dimitris Syrivelis |
Software-defined board- and chip-level optical interconnects for multi-socket communication and disaggregated computing. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong Hu, Daniel Müller-Gritschneder, Ulf Schlichtmann |
Model-based framework for networks-on-chip design space exploration. |
AISTECS@HiPEAC |
2017 |
DBLP DOI BibTeX RDF |
|
| 1 | Gabriele Miorandi, Mahdi Tala, Marco Balboni, Luca Ramini, Davide Bertozzi |
Evolutionary vs. Revolutionary Interconnect Technologies for Future Low-Power Multi-Core Systems. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sören Sonntag, Sandro Bartolini, Giorgos Dimitrakopoulos, José M. García 0001 (eds.) |
Proceedings of the 1st International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems, AISTECS@HiPEAC 2016, Prague, Czech Republic, January 18, 2016 |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Muhammad Ridwan Madarbux, Anouk Van Laer, Philip M. Watts, Timothy M. Jones 0001 |
Energy Efficient And Low Latency Interconnection Network For Multicast Invalidates In Shared Memory Systems. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Armin Runge, Reiner Kolla |
Consideration of the Flit Size for Deflection Routing based Network-on-Chips. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Sébastien Rumley, Meisam Bahadori, Ke Wen, Dessislava Nikolova, Keren Bergman |
PhoenixSim: Crosslayer Design and Modeling of Silicon Photonic Interconnects. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Rafael K. V. Maeda, Peng Yang 0003, Xiaowen Wu, Zhe Wang 0003, Jiang Xu 0001, Zhehui Wang, Haoran Li 0002, Luan H. K. Duong, Zhifei Wang |
JADE: a Heterogeneous Multiprocessor System Simulation Platform Using Recorded and Statistical Application Models. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Najwa Salama, Azeddien M. Sllame |
Designing an Efficient MPLS-Based Switch for FAT Tree Network-on-Chip Systems. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Nikos Terzenidis, Pavlos Maniotis, Nikos Pleros |
Bringing OptoBoards to HPC-scale environments: An OptoHPC simulation engine. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert Hesse, Natalie D. Enright Jerger |
Hierarchical Clustering for On-Chip Networks. |
AISTECS@HiPEAC |
2016 |
DBLP DOI BibTeX RDF |
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