The FacetedDBLP logo    Search for: in:

Disable automatic phrases ?     Syntactic query expansion: ?

Publications at "RAPIDO"( http://dblp.L3S.de/Venues/RAPIDO )

URL (DBLP): http://dblp.uni-trier.de/db/conf/rapido

Publication years (Num. hits)
2012-2014 (19) 2017-2018 (15) 2019-2020 (11)
Publication types (Num. hits)
inproceedings(38) proceedings(7)
Venues (Conferences, Journals, ...)
RAPIDO(45)
GrowBag graphs for keyword ? (Num. hits/coverage)

Group by:
No Growbag Graphs found.

Results
Found 45 publication records. Showing 45 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung 0001, Norbert Wehn System simulation with PULP virtual platform and SystemC. Search on Bibsonomy RAPIDO The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1 Proceedings of the RAPIDO 2020 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Bologna, Italy, January, 2020 Search on Bibsonomy RAPIDO The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Irune Yarza, Mikel Azkarate-askatsua, Peio Onaindia, Philipp Ittershagen, Kim Grüttner, Wolfgang Nebel Static/dynamic real-time legacy software migration: a comparative analysis. Search on Bibsonomy RAPIDO The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Boutheina Bannour, Arnault Lapitre Heuristic-aided symbolic simulation for trickle-based wireless sensors networks configuration. Search on Bibsonomy RAPIDO The full citation details ... 2020 DBLP  DOI  BibTeX  RDF
1Lukas Jünger 0001, Jan Henrik Weinstock, Rainer Leupers, Gerd Ascheid Fast SystemC Processor Models with Unicorn. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Daniel Chillet (eds.) Proceedings of the Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO 2019, Valencia, Spain, January 21-23, 2019. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Rodrigo Cortés Porto, Daniela Genius, Ludovic Apvrille Modeling and Virtual Prototyping for Embedded Systems on Mixed-Signal Multicores. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Amir Charif, Gabriel Busnot, Rania H. Mameesh, Tanguy Sassolas, Nicolas Ventroux Fast Virtual Prototyping for Embedded Computing Systems Design and Exploration. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Abdallah Saad, Ahmed El-Mahdy 0002, Hisham El-Shishiny Performance Modeling of MPI-based Applications on Cloud Multicore Servers. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Bewoayia Kebianyor, Philipp Ittershagen, Kim Grüttner Towards Stateflow Model Aware Debugging with LLDB. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Roberto Giorgi, Marco Procaccini, Farnam Khalili A Design Space Exploration Tool Set for Future 1K-core High-Performance Computers. Search on Bibsonomy RAPIDO The full citation details ... 2019 DBLP  DOI  BibTeX  RDF
1Vittoriano Muttillo, Giacomo Valente, Daniele Ciambrone, Vincenzo Stoico, Luigi Pomante HEPSYCODE-RT: a Real-Time Extension for an ESL HW/SW Co-Design Methodology. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Giovanni Liboni, Julien Deantoni, Antonio Portaluri, Davide Quaglia, Robert de Simone Beyond Time-Triggered Co-simulation of Cyber-Physical Systems for Performance and Accuracy Improvements. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Asif Ali Khan, Fazal Hameed, Jerónimo Castrillón NVMain Extension for Multi-Level Cache Systems. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Irune Yarza, Mikel Azkarate-askasua, Kim Grüttner, Wolfgang Nebel Real-Time Capable Retargeting of Xilinx MicroBlaze Binaries using QEMU: A Feasibility Study. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Daniel Chillet (eds.) Proceedings of the RAPIDO 2018 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Manchester, UK, January 22-24, 2018. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  BibTeX  RDF
1Rabab Bouziane, Erven Rohou, Abdoulaye Gamatié Compile-Time Silent-Store Elimination for Energy Efficiency: an Analytic Evaluation for Non-Volatile Cache Memory. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Ahmet Erdem, Davide Gadioli, Gianluca Palermo, Cristina Silvano Design Space Pruning and Computational Workload Splitting for Autotuning OpenCL Applications. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Gereon Onnebrink, Rainer Leupers, Gerd Ascheid ESL Black Box Power Estimation: Automatic Calibration for IEEE UPF 3.0 Power Models. Search on Bibsonomy RAPIDO The full citation details ... 2018 DBLP  DOI  BibTeX  RDF
1Gustaf Borgström, Andreas Sembrant, David Black-Schaffer Adaptive Cache Warming for Faster Simulations. Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  BibTeX  RDF
1 Proceedings of the 9th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO 2017, Stockholm, Sweden, January 23-25, 2017 Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  DOI  BibTeX  RDF
1Ralf Stemmer, Maher Fakih, Kim Grüttner, Wolfgang Nebel Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication. Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  BibTeX  RDF
1Emanuele Vitali, Gianluca Palermo Early Stage Interference Checking for Automatic Design Space Exploration of Mixed Critical Systems. Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  BibTeX  RDF
1Jan Henrik Weinstock, Rainer Leupers, Gerd Ascheid Accelerating MPSoC Simulation Using Parallel SystemC and Processor Sleep Models. Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  BibTeX  RDF
1Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung 0001, Christian Weis, Norbert Wehn A Bank-Wise DRAM Power Model for System Simulations. Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  BibTeX  RDF
1Kathrin Rosvall, Nima Khalilzad, George Ungureanu, Ingo Sander Throughput Propagation in Constraint-Based Design Space Exploration for Mixed-Criticality Systems. Search on Bibsonomy RAPIDO The full citation details ... 2017 DBLP  BibTeX  RDF
1Emad Samuel Malki Ebeid, Franco Fummi, Davide Quaglia, Hector Posadas, Eugenio Villar A framework for design space exploration and performance analysis of networked embedded systems. Search on Bibsonomy RAPIDO The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Daniel Gracia Pérez, Morteza Biglari-Abhari, Daniel Chillet, Gianluca Palermo (eds.) Proceedings of the 2014 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO '14, 22 January, 2014, Vienna, Austria Search on Bibsonomy RAPIDO The full citation details ... 2014 DBLP  BibTeX  RDF
1Romain Brillu, Sébastien Pillement, Aymen Abdellah, Fabrice Lemonnier, Philippe Millet FlexTiles: a globally homogeneous but locally heterogeneous manycore architecture. Search on Bibsonomy RAPIDO The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Santhosh Kumar Rethinagiri, Oscar Palomar, Rabie Ben Atitallah, Smaïl Niar, Osman S. Unsal, Adrián Cristal Kestelman System-level power estimation tool for embedded processor based platforms. Search on Bibsonomy RAPIDO The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Kyeongyeol Lim, Geehan Park, Minsuk Choi, Youjip Won, Dong-Oh Kim, Hongyeon Kim Workload characteristics of DNA sequence analysis: from storage systems' perspective. Search on Bibsonomy RAPIDO The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Peter van Stralen, Andy D. Pimentel Using chip multithreading to speed up scenario-based design space exploration: a case study. Search on Bibsonomy RAPIDO The full citation details ... 2014 DBLP  DOI  BibTeX  RDF
1Jose Noudohouenou, Vincent Palomares, William Jalby, David C. Wong 0001, David J. Kuck, Jean Christophe Beyler Simsys: a performance simulation framework. Search on Bibsonomy RAPIDO The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Dan Connors, Eric Grover, Blake Caldwell Exploring alternative flexible OpenCL (FlexCL) core designs in FPGA-based MPSoC systems. Search on Bibsonomy RAPIDO The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Romain Prolonge, Fabien Clermidy Network-on-chip traffic modeling for data flow applications. Search on Bibsonomy RAPIDO The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Matthias Jung 0001, Christian Weis, Norbert Wehn, Karthik Chandrasekar 0001 TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. Search on Bibsonomy RAPIDO The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Roland Lezuo, Andreas Krall Using the CASM language for simulator synthesis and model verification. Search on Bibsonomy RAPIDO The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Marco Ceriani, Simone Secchi, Antonino Tumeo, Oreste Villa Prototyping hardware support for irregular applications. Search on Bibsonomy RAPIDO The full citation details ... 2013 DBLP  DOI  BibTeX  RDF
1Nicolas Ventroux, Tanguy Sassolas, Alexandre Guerre, Béatrice Creusillet, Ronan Keryell SESAM/Par4All: a tool for joint exploration of MPSoC architectures and dynamic dataflow code generation. Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Muhammad Irfan Uddin, Chris R. Jesshope, Michiel W. van Tol, Raphael Poss Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores. Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Junjie Lai, André Seznec Break down GPU execution time with an analytical method. Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Daniel Gracia Pérez, Morteza Biglari-Abhari, Daniel Chillet, Gianluca Palermo (eds.) Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO '13, 21 January, 2013, Berlin, Germany Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  BibTeX  RDF
1Raphael Poss, Mike Lankamp, Muhammad Irfan Uddin, Jaroslav Sykora, Leos Kafka Heterogeneous integration to simplify many-core architecture simulations. Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Chad D. Kersey, Arun Rodrigues, Sudhakar Yalamanchili A universal parallel front-end for execution driven microarchitecture simulation. Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  DOI  BibTeX  RDF
1Daniel Gracia Pérez, Smaïl Niar, Cristina Silvano, Morteza Biglari-Abhari (eds.) Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO '12, 23 January, 2012, Paris, France Search on Bibsonomy RAPIDO The full citation details ... 2012 DBLP  BibTeX  RDF
Displaying result #1 - #45 of 45 (100 per page; Change: )
Valid XHTML 1.1! Valid CSS! [Valid RSS]
Maintained by L3S.
Previously maintained by Jörg Diederich.
Based upon DBLP by Michael Ley.
open data data released under the ODC-BY 1.0 license