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Publications at "TPCD"( http://dblp.L3S.de/Venues/TPCD )

URL (DBLP): http://dblp.uni-trier.de/db/conf/tpcd

Publication years (Num. hits)
1992 (17) 1994 (20)
Publication types (Num. hits)
inproceedings(35) proceedings(2)
Venues (Conferences, Journals, ...)
TPCD(37)
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Found 37 publication records. Showing 37 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Michael Kishinevsky, Jørgen Staunstrup Mechanized Verification of Speed-independence. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Michel Allemand Formal Verification of Characteristic Properties. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Mark D. Aagaard, Miriam Leeser Reasoning About Pipelines with Structural Hazards. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Thomas Kropf, Klaus Schneider 0001, Ramayya Kumar A Formal Framework for High Level Synthesis. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1David Cyrluk, S. Rajan, Natarajan Shankar, Mandayam K. Srivas Effective Theorem Proving for Hardware Verification. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Sam Owre, John M. Rushby, Natarajan Shankar, Mandayam K. Srivas A Tutorial on Using PVS for Hardware Verification. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1G. Bezzi, Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Giuseppe Zaza Quantitative Evaluation of Formal Based Synthesis in ASIC Design. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Niels Maretti Mechanized Verification of Refinement. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Holger Busch A Reduced Instruction Set Proof Environment. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Steven D. Johnson, Paul S. Miner, Albert John Camilleri Studies of the Single Pulser in Various Reasoning Systems. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Thomas Kropf Benchmark-Circuits for Hardware-Verification. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Kathi Fisler Extending Formal Reasoning with Support for Hardware Diagrams. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Phillip J. Windley, Michael L. Coe A Correctness Model for Pipelined Multiprocessors. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Laurence Pierre An Automatic Generalization Method for the Inductive Proof of Replicated and Parallel Architectures. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Junji Kitamichi, Sumio Morioka, Teruo Higashino, Kenichi Taniguchi Automatic Correctness Proof of the Implementation of Synchronous Sequential Circuits Using an Algebraic Approach. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1John W. O'Leary, Miriam Leeser, Jason Hickey, Mark D. Aagaard Non-Restoring Integer Square Root: A Case Study in Design by Principled Optimization. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Zheng Zhu A Compositional Circuit Model and Verification by Composition. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1C. A. J. van Eijk, Geert Janssen Exploiting Structural Similarities in a BDD-Based Verification Method. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Ramayya Kumar, Thomas Kropf (eds.) Theorem Provers in Circuit Design - Theory, Practice and Experience, Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26-28, 1994, Proceedings Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Niels Mellergaard, Jørgen Staunstrup Tutorial on Design Verification with Synchronized Transitions. Search on Bibsonomy TPCD The full citation details ... 1994 DBLP  DOI  BibTeX  RDF
1Keith Hanna, Neil Daeche, Gareth Howells 0001 Implementation of the Veritas Design Logic. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Victoria Stavridou, Thomas F. Melham, Raymond T. Boute (eds.) Theorem Provers in Circuit Design, Proceedings of the IFIP TC10/WG 10.2 International Conference on Theorem Provers in Circuit Design: Theory, Practice and Experience, Nijmegen, The Netherlands, 22-24 June 1992, Proceedings Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Mark Bickford, Mandayam K. Srivas Verification of a Fault-Tolerant Property of a Multiprocessor System: A Case Study in Theorem Prover-Based Verification. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Holger Busch Transformational Design in a Theorem Prover. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Simon Bainbridge, Albert John Camilleri, Roger Fleming Theorem Proving as an Industrial Tool for System Level Desgin. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1John Herbert Incremental Design and Formal Verification of Microcoded Microporcessors. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Jørgen Staunstrup, Stephen J. Garland, John V. Guttag Mechanized Verification of Circuit Descriptions Using the Larch Prover. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Victoria Stavridou, Joseph A. Goguen, Andrew Stevens, Steven M. Eker, Serge N. Aloneftis, Keith Michael Hobley FUNNEL and 2OBJ: Towards an Integrated Hardware Design Environment. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Beth Levy, Ivan Filippenko, Leo Marcus, Telis Menas Using the State Delta Verification System (SDVS) for Hardware Verification. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man A Description Methodology for Parameterized Modules in the Boyer-Moore Logic. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Keith Hanna, Neil Daeche The Veritas Design Logic: A User's View. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Paul B. Jackson Nuprl and Its Use in Circuit Design. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Tiziana Margaria Hierarchical Mixed-Mode Verification of Complex FSMs Described at the RT Level. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Richard J. Boulton, Andrew D. Gordon 0001, Michael J. C. Gordon, John Harrison 0001, John Herbert, John Van Tassel Experience with Embedding Hardware Description Languages in HOL. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Bishop Brock, Warren A. Hunt Jr., William D. Young Introduction to a Formally Defined Hardware Description Language. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1Hans Henrik Løvengreen, Jørgen Staunstrup Synchronous Realization of Asynchronous Computations. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
1D. J. Kinniment, Albert Koelmans Modelling and Verification of Timing Conditions with the Boyer Moore Prover. Search on Bibsonomy TPCD The full citation details ... 1992 DBLP  BibTeX  RDF
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